1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
5 * Changes for multibus/multiadapter I2C support.
6 *
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
10 * The original I2C interface was
11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
13 * but has been changed substantially.
14 */
15
16 #ifndef _I2C_H_
17 #define _I2C_H_
18
19 /*
20 * For now there are essentially two parts to this file - driver model
21 * here at the top, and the older code below (with CONFIG_SYS_I2C being
22 * most recent). The plan is to migrate everything to driver model.
23 * The driver model structures and API are separate as they are different
24 * enough as to be incompatible for compilation purposes.
25 */
26
27 enum dm_i2c_chip_flags {
28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
29 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
30 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
31 };
32
33 struct udevice;
34 /**
35 * struct dm_i2c_chip - information about an i2c chip
36 *
37 * An I2C chip is a device on the I2C bus. It sits at a particular address
38 * and normally supports 7-bit or 10-bit addressing.
39 *
40 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
41 * the chip to examine.
42 *
43 * @chip_addr: Chip address on bus
44 * @offset_len: Length of offset in bytes. A single byte offset can
45 * represent up to 256 bytes. A value larger than 1 may be
46 * needed for larger devices.
47 * @flags: Flags for this chip (dm_i2c_chip_flags)
48 * @emul: Emulator for this chip address (only used for emulation)
49 */
50 struct dm_i2c_chip {
51 uint chip_addr;
52 uint offset_len;
53 uint flags;
54 #ifdef CONFIG_SANDBOX
55 struct udevice *emul;
56 bool test_mode;
57 #endif
58 };
59
60 /**
61 * struct dm_i2c_bus- information about an i2c bus
62 *
63 * An I2C bus contains 0 or more chips on it, each at its own address. The
64 * bus can operate at different speeds (measured in Hz, typically 100KHz
65 * or 400KHz).
66 *
67 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
68 * I2C bus udevice.
69 *
70 * @speed_hz: Bus speed in hertz (typically 100000)
71 * @max_transaction_bytes: Maximal size of single I2C transfer
72 */
73 struct dm_i2c_bus {
74 int speed_hz;
75 int max_transaction_bytes;
76 };
77
78 /*
79 * Not all of these flags are implemented in the U-Boot API
80 */
81 enum dm_i2c_msg_flags {
82 I2C_M_TEN = 0x0010, /* ten-bit chip address */
83 I2C_M_RD = 0x0001, /* read data, from slave to master */
84 I2C_M_STOP = 0x8000, /* send stop after this message */
85 I2C_M_NOSTART = 0x4000, /* no start before this message */
86 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
87 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
88 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
89 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
90 };
91
92 /**
93 * struct i2c_msg - an I2C message
94 *
95 * @addr: Slave address
96 * @flags: Flags (see enum dm_i2c_msg_flags)
97 * @len: Length of buffer in bytes, may be 0 for a probe
98 * @buf: Buffer to send/receive, or NULL if no data
99 */
100 struct i2c_msg {
101 uint addr;
102 uint flags;
103 uint len;
104 u8 *buf;
105 };
106
107 /**
108 * struct i2c_msg_list - a list of I2C messages
109 *
110 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
111 * appropriate in U-Boot.
112 *
113 * @msg: Pointer to i2c_msg array
114 * @nmsgs: Number of elements in the array
115 */
116 struct i2c_msg_list {
117 struct i2c_msg *msgs;
118 uint nmsgs;
119 };
120
121 /**
122 * dm_i2c_read() - read bytes from an I2C chip
123 *
124 * To obtain an I2C device (called a 'chip') given the I2C bus address you
125 * can use i2c_get_chip(). To obtain a bus by bus number use
126 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
127 *
128 * To set the address length of a devce use i2c_set_addr_len(). It
129 * defaults to 1.
130 *
131 * @dev: Chip to read from
132 * @offset: Offset within chip to start reading
133 * @buffer: Place to put data
134 * @len: Number of bytes to read
135 *
136 * @return 0 on success, -ve on failure
137 */
138 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
139
140 /**
141 * dm_i2c_write() - write bytes to an I2C chip
142 *
143 * See notes for dm_i2c_read() above.
144 *
145 * @dev: Chip to write to
146 * @offset: Offset within chip to start writing
147 * @buffer: Buffer containing data to write
148 * @len: Number of bytes to write
149 *
150 * @return 0 on success, -ve on failure
151 */
152 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
153 int len);
154
155 /**
156 * dm_i2c_probe() - probe a particular chip address
157 *
158 * This can be useful to check for the existence of a chip on the bus.
159 * It is typically implemented by writing the chip address to the bus
160 * and checking that the chip replies with an ACK.
161 *
162 * @bus: Bus to probe
163 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
164 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
165 * @devp: Returns the device found, or NULL if none
166 * @return 0 if a chip was found at that address, -ve if not
167 */
168 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
169 struct udevice **devp);
170
171 /**
172 * dm_i2c_reg_read() - Read a value from an I2C register
173 *
174 * This reads a single value from the given address in an I2C chip
175 *
176 * @dev: Device to use for transfer
177 * @addr: Address to read from
178 * @return value read, or -ve on error
179 */
180 int dm_i2c_reg_read(struct udevice *dev, uint offset);
181
182 /**
183 * dm_i2c_reg_write() - Write a value to an I2C register
184 *
185 * This writes a single value to the given address in an I2C chip
186 *
187 * @dev: Device to use for transfer
188 * @addr: Address to write to
189 * @val: Value to write (normally a byte)
190 * @return 0 on success, -ve on error
191 */
192 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
193
194 /**
195 * dm_i2c_xfer() - Transfer messages over I2C
196 *
197 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
198 * instead.
199 *
200 * @dev: Device to use for transfer
201 * @msg: List of messages to transfer
202 * @nmsgs: Number of messages to transfer
203 * @return 0 on success, -ve on error
204 */
205 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
206
207 /**
208 * dm_i2c_set_bus_speed() - set the speed of a bus
209 *
210 * @bus: Bus to adjust
211 * @speed: Requested speed in Hz
212 * @return 0 if OK, -EINVAL for invalid values
213 */
214 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
215
216 /**
217 * dm_i2c_get_bus_speed() - get the speed of a bus
218 *
219 * @bus: Bus to check
220 * @return speed of selected I2C bus in Hz, -ve on error
221 */
222 int dm_i2c_get_bus_speed(struct udevice *bus);
223
224 /**
225 * i2c_set_chip_flags() - set flags for a chip
226 *
227 * Typically addresses are 7 bits, but for 10-bit addresses you should set
228 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
229 *
230 * @dev: Chip to adjust
231 * @flags: New flags
232 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
233 */
234 int i2c_set_chip_flags(struct udevice *dev, uint flags);
235
236 /**
237 * i2c_get_chip_flags() - get flags for a chip
238 *
239 * @dev: Chip to check
240 * @flagsp: Place to put flags
241 * @return 0 if OK, other -ve value on error
242 */
243 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
244
245 /**
246 * i2c_set_offset_len() - set the offset length for a chip
247 *
248 * The offset used to access a chip may be up to 4 bytes long. Typically it
249 * is only 1 byte, which is enough for chips with 256 bytes of memory or
250 * registers. The default value is 1, but you can call this function to
251 * change it.
252 *
253 * @offset_len: New offset length value (typically 1 or 2)
254 */
255 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
256
257 /**
258 * i2c_get_offset_len() - get the offset length for a chip
259 *
260 * @return: Current offset length value (typically 1 or 2)
261 */
262 int i2c_get_chip_offset_len(struct udevice *dev);
263
264 /**
265 * i2c_deblock() - recover a bus that is in an unknown state
266 *
267 * See the deblock() method in 'struct dm_i2c_ops' for full information
268 *
269 * @bus: Bus to recover
270 * @return 0 if OK, -ve on error
271 */
272 int i2c_deblock(struct udevice *bus);
273
274 /**
275 * struct dm_i2c_ops - driver operations for I2C uclass
276 *
277 * Drivers should support these operations unless otherwise noted. These
278 * operations are intended to be used by uclass code, not directly from
279 * other code.
280 */
281 struct dm_i2c_ops {
282 /**
283 * xfer() - transfer a list of I2C messages
284 *
285 * @bus: Bus to read from
286 * @msg: List of messages to transfer
287 * @nmsgs: Number of messages in the list
288 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
289 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
290 * flags cannot be supported, other -ve value on some other error
291 */
292 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
293
294 /**
295 * probe_chip() - probe for the presense of a chip address
296 *
297 * This function is optional. If omitted, the uclass will send a zero
298 * length message instead.
299 *
300 * @bus: Bus to probe
301 * @chip_addr: Chip address to probe
302 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
303 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
304 * to default probem other -ve value on error
305 */
306 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
307
308 /**
309 * set_bus_speed() - set the speed of a bus (optional)
310 *
311 * The bus speed value will be updated by the uclass if this function
312 * does not return an error. This method is optional - if it is not
313 * provided then the driver can read the speed from
314 * dev_get_uclass_priv(bus)->speed_hz
315 *
316 * @bus: Bus to adjust
317 * @speed: Requested speed in Hz
318 * @return 0 if OK, -EINVAL for invalid values
319 */
320 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
321
322 /**
323 * get_bus_speed() - get the speed of a bus (optional)
324 *
325 * Normally this can be provided by the uclass, but if you want your
326 * driver to check the bus speed by looking at the hardware, you can
327 * implement that here. This method is optional. This method would
328 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
329 *
330 * @bus: Bus to check
331 * @return speed of selected I2C bus in Hz, -ve on error
332 */
333 int (*get_bus_speed)(struct udevice *bus);
334
335 /**
336 * set_flags() - set the flags for a chip (optional)
337 *
338 * This is generally implemented by the uclass, but drivers can
339 * check the value to ensure that unsupported options are not used.
340 * This method is optional. If provided, this method will always be
341 * called when the flags change.
342 *
343 * @dev: Chip to adjust
344 * @flags: New flags value
345 * @return 0 if OK, -EINVAL if value is unsupported
346 */
347 int (*set_flags)(struct udevice *dev, uint flags);
348
349 /**
350 * deblock() - recover a bus that is in an unknown state
351 *
352 * I2C is a synchronous protocol and resets of the processor in the
353 * middle of an access can block the I2C Bus until a powerdown of
354 * the full unit is done. This is because slaves can be stuck
355 * waiting for addition bus transitions for a transaction that will
356 * never complete. Resetting the I2C master does not help. The only
357 * way is to force the bus through a series of transitions to make
358 * sure that all slaves are done with the transaction. This method
359 * performs this 'deblocking' if support by the driver.
360 *
361 * This method is optional.
362 */
363 int (*deblock)(struct udevice *bus);
364 };
365
366 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
367
368 /**
369 * struct i2c_mux_ops - operations for an I2C mux
370 *
371 * The current mux state is expected to be stored in the mux itself since
372 * it is the only thing that knows how to make things work. The mux can
373 * record the current state and then avoid switching unless it is necessary.
374 * So select() can be skipped if the mux is already in the correct state.
375 * Also deselect() can be made a nop if required.
376 */
377 struct i2c_mux_ops {
378 /**
379 * select() - select one of of I2C buses attached to a mux
380 *
381 * This will be called when there is no bus currently selected by the
382 * mux. This method does not need to deselect the old bus since
383 * deselect() will be already have been called if necessary.
384 *
385 * @mux: Mux device
386 * @bus: I2C bus to select
387 * @channel: Channel number correponding to the bus to select
388 * @return 0 if OK, -ve on error
389 */
390 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
391
392 /**
393 * deselect() - select one of of I2C buses attached to a mux
394 *
395 * This is used to deselect the currently selected I2C bus.
396 *
397 * @mux: Mux device
398 * @bus: I2C bus to deselect
399 * @channel: Channel number correponding to the bus to deselect
400 * @return 0 if OK, -ve on error
401 */
402 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
403 };
404
405 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
406
407 /**
408 * i2c_get_chip() - get a device to use to access a chip on a bus
409 *
410 * This returns the device for the given chip address. The device can then
411 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
412 *
413 * @bus: Bus to examine
414 * @chip_addr: Chip address for the new device
415 * @offset_len: Length of a register offset in bytes (normally 1)
416 * @devp: Returns pointer to new device if found or -ENODEV if not
417 * found
418 */
419 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
420 struct udevice **devp);
421
422 /**
423 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
424 * a bus number
425 *
426 * This returns the device for the given chip address on a particular bus
427 * number.
428 *
429 * @busnum: Bus number to examine
430 * @chip_addr: Chip address for the new device
431 * @offset_len: Length of a register offset in bytes (normally 1)
432 * @devp: Returns pointer to new device if found or -ENODEV if not
433 * found
434 */
435 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
436 struct udevice **devp);
437
438 /**
439 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
440 *
441 * This decodes the chip address from a device tree node and puts it into
442 * its dm_i2c_chip structure. This should be called in your driver's
443 * ofdata_to_platdata() method.
444 *
445 * @blob: Device tree blob
446 * @node: Node offset to read from
447 * @spi: Place to put the decoded information
448 */
449 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
450
451 /**
452 * i2c_dump_msgs() - Dump a list of I2C messages
453 *
454 * This may be useful for debugging.
455 *
456 * @msg: Message list to dump
457 * @nmsgs: Number of messages
458 */
459 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
460
461 /**
462 * i2c_emul_find() - Find an emulator for an i2c sandbox device
463 *
464 * This looks at the device's 'emul' phandle
465 *
466 * @dev: Device to find an emulator for
467 * @emulp: Returns the associated emulator, if found *
468 * @return 0 if OK, -ENOENT or -ENODEV if not found
469 */
470 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
471
472 /**
473 * i2c_emul_get_device() - Find the device being emulated
474 *
475 * Given an emulator this returns the associated device
476 *
477 * @emul: Emulator for the device
478 * @return device that @emul is emulating
479 */
480 struct udevice *i2c_emul_get_device(struct udevice *emul);
481
482 #ifndef CONFIG_DM_I2C
483
484 /*
485 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
486 *
487 * The implementation MUST NOT use static or global variables if the
488 * I2C routines are used to read SDRAM configuration information
489 * because this is done before the memories are initialized. Limited
490 * use of stack-based variables are OK (the initial stack size is
491 * limited).
492 *
493 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
494 */
495
496 /*
497 * Configuration items.
498 */
499 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
500
501 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
502 /* no muxes used bus = i2c adapters */
503 #define CONFIG_SYS_I2C_DIRECT_BUS 1
504 #define CONFIG_SYS_I2C_MAX_HOPS 0
505 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
506 #else
507 /* we use i2c muxes */
508 #undef CONFIG_SYS_I2C_DIRECT_BUS
509 #endif
510
511 /* define the I2C bus number for RTC and DTT if not already done */
512 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
513 #define CONFIG_SYS_RTC_BUS_NUM 0
514 #endif
515 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
516 #define CONFIG_SYS_SPD_BUS_NUM 0
517 #endif
518
519 struct i2c_adapter {
520 void (*init)(struct i2c_adapter *adap, int speed,
521 int slaveaddr);
522 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
523 int (*read)(struct i2c_adapter *adap, uint8_t chip,
524 uint addr, int alen, uint8_t *buffer,
525 int len);
526 int (*write)(struct i2c_adapter *adap, uint8_t chip,
527 uint addr, int alen, uint8_t *buffer,
528 int len);
529 uint (*set_bus_speed)(struct i2c_adapter *adap,
530 uint speed);
531 int speed;
532 int waitdelay;
533 int slaveaddr;
534 int init_done;
535 int hwadapnr;
536 char *name;
537 };
538
539 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
540 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
541 { \
542 .init = _init, \
543 .probe = _probe, \
544 .read = _read, \
545 .write = _write, \
546 .set_bus_speed = _set_speed, \
547 .speed = _speed, \
548 .slaveaddr = _slaveaddr, \
549 .init_done = 0, \
550 .hwadapnr = _hwadapnr, \
551 .name = #_name \
552 };
553
554 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
555 _set_speed, _speed, _slaveaddr, _hwadapnr) \
556 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
557 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
558 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
559
560 struct i2c_adapter *i2c_get_adapter(int index);
561
562 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
563 struct i2c_mux {
564 int id;
565 char name[16];
566 };
567
568 struct i2c_next_hop {
569 struct i2c_mux mux;
570 uint8_t chip;
571 uint8_t channel;
572 };
573
574 struct i2c_bus_hose {
575 int adapter;
576 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
577 };
578 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
579 extern struct i2c_bus_hose i2c_bus[];
580
581 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
582 #else
583 #define I2C_ADAPTER(bus) bus
584 #endif
585 #define I2C_BUS gd->cur_i2c_bus
586
587 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
588 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
589 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
590
591 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
592 #define I2C_MUX_PCA9540_ID 1
593 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
594 #define I2C_MUX_PCA9542_ID 2
595 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
596 #define I2C_MUX_PCA9544_ID 3
597 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
598 #define I2C_MUX_PCA9547_ID 4
599 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
600 #define I2C_MUX_PCA9548_ID 5
601 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
602 #endif
603
604 #ifndef I2C_SOFT_DECLARATIONS
605 # if (defined(CONFIG_AT91RM9200) || \
606 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
607 defined(CONFIG_AT91SAM9263))
608 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
609 # else
610 # define I2C_SOFT_DECLARATIONS
611 # endif
612 #endif
613
614 /*
615 * Many boards/controllers/drivers don't support an I2C slave interface so
616 * provide a default slave address for them for use in common code. A real
617 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
618 * support a slave interface.
619 */
620 #ifndef CONFIG_SYS_I2C_SLAVE
621 #define CONFIG_SYS_I2C_SLAVE 0xfe
622 #endif
623
624 /*
625 * Initialization, must be called once on start up, may be called
626 * repeatedly to change the speed and slave addresses.
627 */
628 #ifdef CONFIG_SYS_I2C_EARLY_INIT
629 void i2c_early_init_f(void);
630 #endif
631 void i2c_init(int speed, int slaveaddr);
632 void i2c_init_board(void);
633
634 #ifdef CONFIG_SYS_I2C
635 /*
636 * i2c_get_bus_num:
637 *
638 * Returns index of currently active I2C bus. Zero-based.
639 */
640 unsigned int i2c_get_bus_num(void);
641
642 /*
643 * i2c_set_bus_num:
644 *
645 * Change the active I2C bus. Subsequent read/write calls will
646 * go to this one.
647 *
648 * bus - bus index, zero based
649 *
650 * Returns: 0 on success, not 0 on failure
651 *
652 */
653 int i2c_set_bus_num(unsigned int bus);
654
655 /*
656 * i2c_init_all():
657 *
658 * Initializes all I2C adapters in the system. All i2c_adap structures must
659 * be initialized beforehead with function pointers and data, including
660 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
661 */
662 void i2c_init_all(void);
663
664 /*
665 * Probe the given I2C chip address. Returns 0 if a chip responded,
666 * not 0 on failure.
667 */
668 int i2c_probe(uint8_t chip);
669
670 /*
671 * Read/Write interface:
672 * chip: I2C chip address, range 0..127
673 * addr: Memory (register) address within the chip
674 * alen: Number of bytes to use for addr (typically 1, 2 for larger
675 * memories, 0 for register type devices with only one
676 * register)
677 * buffer: Where to read/write the data
678 * len: How many bytes to read/write
679 *
680 * Returns: 0 on success, not 0 on failure
681 */
682 int i2c_read(uint8_t chip, unsigned int addr, int alen,
683 uint8_t *buffer, int len);
684
685 int i2c_write(uint8_t chip, unsigned int addr, int alen,
686 uint8_t *buffer, int len);
687
688 /*
689 * Utility routines to read/write registers.
690 */
691 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
692
693 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
694
695 /*
696 * i2c_set_bus_speed:
697 *
698 * Change the speed of the active I2C bus
699 *
700 * speed - bus speed in Hz
701 *
702 * Returns: new bus speed
703 *
704 */
705 unsigned int i2c_set_bus_speed(unsigned int speed);
706
707 /*
708 * i2c_get_bus_speed:
709 *
710 * Returns speed of currently active I2C bus in Hz
711 */
712
713 unsigned int i2c_get_bus_speed(void);
714
715 #else
716
717 /*
718 * Probe the given I2C chip address. Returns 0 if a chip responded,
719 * not 0 on failure.
720 */
721 int i2c_probe(uchar chip);
722
723 /*
724 * Read/Write interface:
725 * chip: I2C chip address, range 0..127
726 * addr: Memory (register) address within the chip
727 * alen: Number of bytes to use for addr (typically 1, 2 for larger
728 * memories, 0 for register type devices with only one
729 * register)
730 * buffer: Where to read/write the data
731 * len: How many bytes to read/write
732 *
733 * Returns: 0 on success, not 0 on failure
734 */
735 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
736 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
737
738 /*
739 * Utility routines to read/write registers.
740 */
i2c_reg_read(u8 addr,u8 reg)741 static inline u8 i2c_reg_read(u8 addr, u8 reg)
742 {
743 u8 buf;
744
745 #ifdef DEBUG
746 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
747 #endif
748
749 i2c_read(addr, reg, 1, &buf, 1);
750
751 return buf;
752 }
753
i2c_reg_write(u8 addr,u8 reg,u8 val)754 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
755 {
756 #ifdef DEBUG
757 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
758 __func__, addr, reg, val);
759 #endif
760
761 i2c_write(addr, reg, 1, &val, 1);
762 }
763
764 /*
765 * Functions for setting the current I2C bus and its speed
766 */
767
768 /*
769 * i2c_set_bus_num:
770 *
771 * Change the active I2C bus. Subsequent read/write calls will
772 * go to this one.
773 *
774 * bus - bus index, zero based
775 *
776 * Returns: 0 on success, not 0 on failure
777 *
778 */
779 int i2c_set_bus_num(unsigned int bus);
780
781 /*
782 * i2c_get_bus_num:
783 *
784 * Returns index of currently active I2C bus. Zero-based.
785 */
786
787 unsigned int i2c_get_bus_num(void);
788
789 /*
790 * i2c_set_bus_speed:
791 *
792 * Change the speed of the active I2C bus
793 *
794 * speed - bus speed in Hz
795 *
796 * Returns: 0 on success, not 0 on failure
797 *
798 */
799 int i2c_set_bus_speed(unsigned int);
800
801 /*
802 * i2c_get_bus_speed:
803 *
804 * Returns speed of currently active I2C bus in Hz
805 */
806
807 unsigned int i2c_get_bus_speed(void);
808 #endif /* CONFIG_SYS_I2C */
809
810 /*
811 * only for backwardcompatibility, should go away if we switched
812 * completely to new multibus support.
813 */
814 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
815 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
816 # define CONFIG_SYS_MAX_I2C_BUS 2
817 # endif
818 # define I2C_MULTI_BUS 1
819 #else
820 # define CONFIG_SYS_MAX_I2C_BUS 1
821 # define I2C_MULTI_BUS 0
822 #endif
823
824 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
825 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
I2C_GET_BUS(void)826 static inline unsigned int I2C_GET_BUS(void)
827 {
828 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
829 }
830
831 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
I2C_SET_BUS(unsigned int bus)832 static inline void I2C_SET_BUS(unsigned int bus)
833 {
834 if (I2C_MULTI_BUS)
835 i2c_set_bus_num(bus);
836 }
837
838 /* Multi I2C definitions */
839 enum {
840 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
841 I2C_8, I2C_9, I2C_10,
842 };
843
844 /**
845 * Get FDT values for i2c bus.
846 *
847 * @param blob Device tree blbo
848 * @return the number of I2C bus
849 */
850 void board_i2c_init(const void *blob);
851
852 /**
853 * Find the I2C bus number by given a FDT I2C node.
854 *
855 * @param blob Device tree blbo
856 * @param node FDT I2C node to find
857 * @return the number of I2C bus (zero based), or -1 on error
858 */
859 int i2c_get_bus_num_fdt(int node);
860
861 /**
862 * Reset the I2C bus represented by the given a FDT I2C node.
863 *
864 * @param blob Device tree blbo
865 * @param node FDT I2C node to find
866 * @return 0 if port was reset, -1 if not found
867 */
868 int i2c_reset_port_fdt(const void *blob, int node);
869
870 #endif /* !CONFIG_DM_I2C */
871
872 #endif /* _I2C_H_ */
873