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Searched refs:ID_AA64MMFR2_EL1 (Results 1 – 7 of 7) sorted by relevance

/external/llvm/test/MC/Disassembler/AArch64/
Darmv8.2a-mmfr2.txt4 # CHECK: mrs x3, ID_AA64MMFR2_EL1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darmv8.2a-mmfr2.txt4 # CHECK: mrs x3, ID_AA64MMFR2_EL1
/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h498 DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64mmfr2_el1, ID_AA64MMFR2_EL1) in DEFINE_SYSREG_READ_FUNC()
Darch.h203 #define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 macro
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc196 ID_AA64MMFR2_EL1 = 49210,
2023 { "ID_AA64MMFR2_EL1", 0xC03A, true, false, {AArch64::HasV8_2aOps} }, // 41
3031 { "ID_AA64MMFR2_EL1", 41 },
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td351 def : ROSysReg<"ID_AA64MMFR2_EL1", 0b11, 0b000, 0b0000, 0b0111, 0b010> {
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td515 def : ROSysReg<"ID_AA64MMFR2_EL1", 0b11, 0b000, 0b0000, 0b0111, 0b010> {