| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 947 int32_t Imm8 = MI.getOperand(OpIdx).getImm(); in getT2Imm8s4OpValue() local
948 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue()
951 if (Imm8 < 0) in getT2Imm8s4OpValue()
952 Imm8 = -(uint32_t)Imm8; in getT2Imm8s4OpValue()
955 Imm8 /= 4; in getT2Imm8s4OpValue()
957 uint32_t Binary = Imm8 & 0xff; in getT2Imm8s4OpValue()
973 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local
979 Imm8 = 0; in getT2AddrModeImm8s4OpValue()
989 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI); in getT2AddrModeImm8s4OpValue()
997 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue()
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| D | ARMAddressingModes.h | 543 unsigned Imm8 = getNEONModImmVal(ModImm); in decodeNEONModImm() local
548 Val = Imm8; in decodeNEONModImm()
553 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
558 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
563 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeNEONModImm()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 936 int32_t Imm8 = MI.getOperand(OpIdx).getImm(); in getT2Imm8s4OpValue() local
937 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue()
940 if (Imm8 < 0) in getT2Imm8s4OpValue()
941 Imm8 = -(uint32_t)Imm8; in getT2Imm8s4OpValue()
944 Imm8 /= 4; in getT2Imm8s4OpValue()
946 uint32_t Binary = Imm8 & 0xff; in getT2Imm8s4OpValue()
962 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local
968 Imm8 = 0; in getT2AddrModeImm8s4OpValue()
978 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI); in getT2AddrModeImm8s4OpValue()
986 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue()
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| D | ARMAddressingModes.h | 566 unsigned Imm8 = getNEONModImmVal(ModImm); in decodeNEONModImm() local
571 Val = Imm8; in decodeNEONModImm()
576 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
581 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
586 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeNEONModImm()
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| /external/capstone/arch/ARM/ |
| D | ARMAddressingModes.h | 602 unsigned Imm8 = getNEONModImmVal(ModImm); in ARM_AM_decodeNEONModImm() local
608 Val = Imm8; in ARM_AM_decodeNEONModImm()
613 Val = (uint64_t)Imm8 << (8 * ByteNum); in ARM_AM_decodeNEONModImm()
618 Val = (uint64_t)Imm8 << (8 * ByteNum); in ARM_AM_decodeNEONModImm()
623 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in ARM_AM_decodeNEONModImm()
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| /external/v8/src/diagnostics/ia32/ |
| D | disasm-ia32.cc | 188 int8_t Imm8(const uint8_t* data) { in Imm8() function
429 int disp = mod == 2 ? Imm32(modrmp + 2) : Imm8(modrmp + 2); in PrintRightOperandHelper()
441 int disp = mod == 2 ? Imm32(modrmp + 1) : Imm8(modrmp + 1); in PrintRightOperandHelper()
823 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(current)); in AVXInstruction()
829 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(current)); in AVXInstruction()
835 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(current)); in AVXInstruction()
842 AppendToBuffer(",%d", Imm8(current)); in AVXInstruction()
849 AppendToBuffer(",%d", Imm8(current)); in AVXInstruction()
856 AppendToBuffer(",%d", Imm8(current)); in AVXInstruction()
908 AppendToBuffer(",%d", Imm8(current)); in AVXInstruction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 456 Imm8 = 1 << ImmShift, enumerator
596 case X86II::Imm8: in getSizeOfImm()
617 case X86II::Imm8: in isImmPCRel()
634 case X86II::Imm8: in isImmSigned()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 404 Imm8 = 1 << ImmShift, enumerator
577 case X86II::Imm8: in getSizeOfImm()
597 case X86II::Imm8: in isImmPCRel()
613 case X86II::Imm8: in isImmSigned()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 66 def Imm8 : ImmType<1>;
350 : X86Inst<o, f, Imm8, outs, ins, asm, itin, d> {
519 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix.
549 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
551 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
553 // PDIi8 - SSE2 instructions with ImmT == Imm8 and PD prefix.
559 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as
561 // MMXSSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix as well as
661 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8.
696 // AVXAIi8 - AVX instructions with TAPD prefix and ImmT = Imm8.
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| D | X86InstrArithmetic.td | 576 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
619 Imm8, i8imm, imm8_su, i8imm, invalid_node,
797 let ImmT = Imm8; // Always 8-bit immediate.
892 let ImmT = Imm8; // Always 8-bit immediate.
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 76 def Imm8 : ImmType<1>;
384 : X86Inst<o, f, Imm8, outs, ins, asm, d> {
561 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix.
591 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
593 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
595 // PDIi8 - SSE2 instructions with ImmT == Imm8 and PD prefix.
601 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as
603 // MMXSSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix as well as
703 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8.
738 // AVXAIi8 - AVX instructions with TAPD prefix and ImmT = Imm8.
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| D | X86InstrArithmetic.td | 550 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
593 Imm8, i8imm, imm8_su, i8imm, invalid_node,
756 let ImmT = Imm8; // Always 8-bit immediate.
850 let ImmT = Imm8; // Always 8-bit immediate.
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 220 IValueT &Cmode, IValueT &Imm8) { in encodeAdvSIMDExpandImm() argument
225 Imm8 = Value; in encodeAdvSIMDExpandImm()
436 IValueT encodeImmRegOffsetEnc3(IValueT Rn, IOffsetT Imm8, in encodeImmRegOffsetEnc3() argument
439 if (Imm8 < 0) { in encodeImmRegOffsetEnc3()
440 Imm8 = -Imm8; in encodeImmRegOffsetEnc3()
443 assert(Imm8 < (1 << 8)); in encodeImmRegOffsetEnc3()
444 Value = Value | B22 | ((Imm8 & 0xf0) << 4) | (Imm8 & 0x0f); in encodeImmRegOffsetEnc3()
855 IValueT Imm8; in emitType01() local
856 if (!OperandARM32FlexImm::canHoldImm(Src1Value, &RotateAmt, &Imm8)) in emitType01()
859 Src1Value = encodeRotatedImm8(RotateAmt, Imm8); in emitType01()
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| D | IceTargetLoweringARM32.cpp | 1992 uint32_t Imm8, Rotate; in legalizeMemOperand() local
1996 } else if (OperandARM32FlexImm::canHoldImm(OffsetDiff, &Rotate, &Imm8)) { in legalizeMemOperand()
1998 Target->Func, IceType_i32, Imm8, Rotate); in legalizeMemOperand()
2002 } else if (OperandARM32FlexImm::canHoldImm(-OffsetDiff, &Rotate, &Imm8)) { in legalizeMemOperand()
2004 Target->Func, IceType_i32, Imm8, Rotate); in legalizeMemOperand()
2526 uint32_t Rotate, Imm8; in immediateIsFlexEncodable() local
2527 return OperandARM32FlexImm::canHoldImm(getConstantValue(), &Rotate, &Imm8); in immediateIsFlexEncodable()
2531 uint32_t Rotate, Imm8; in negatedImmediateIsFlexEncodable() local
2533 -static_cast<int32_t>(getConstantValue()), &Rotate, &Imm8); in negatedImmediateIsFlexEncodable()
2543 uint32_t Rotate, Imm8; in invertedImmediateIsFlexEncodable() local
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| D | IceInstARM32.cpp | 383 uint32_t Imm8 = Utils::rotateLeft32(Immediate, 2 * Rot); in canHoldImm() local
384 if (Imm8 <= 0xFF) { in canHoldImm()
386 *Immed_8 = Imm8; in canHoldImm()
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| /external/v8/src/diagnostics/x64/ |
| D | disasm-x64.cc | 247 int8_t Imm8(const uint8_t* data) { in Imm8() function
535 int disp = (mod == 2) ? Imm32(modrmp + 2) : Imm8(modrmp + 2); in PrintRightOperandHelper()
547 int disp = (mod == 2) ? Imm32(modrmp + 1) : Imm8(modrmp + 1); in PrintRightOperandHelper()
2845 AppendToBuffer("push 0x%x", Imm8(data + 1)); in InstructionDecode()
2941 AppendToBuffer("cmp al,0x%x", Imm8(data + 1)); in InstructionDecode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6808 unsigned Imm8 = Inst.getOperand(0).getImm(); in validateInstruction() local
6812 if (Imm8 == 0x10 && Pred != ARMCC::AL && hasRAS()) in validateInstruction()
6816 if (Imm8 == 0x14 && Pred != ARMCC::AL) in validateInstruction()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6551 unsigned Imm8 = Inst.getOperand(0).getImm(); in validateInstruction() local
6553 if (Imm8 == 0x10 && Pred != ARMCC::AL) in validateInstruction()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 646 def Imm8AsmOperand: ImmAsmOperand { let Name = "Imm8"; }
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 745 def Imm8AsmOperand: ImmAsmOperand<8,8> { let Name = "Imm8"; }
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 6161 // 'Imm8' class
|