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Searched refs:InputInt8 (Results 1 – 9 of 9) sorted by relevance

/external/v8/src/compiler/backend/ia32/
Dcode-generator-ia32.cc1659 __ mov_b(operand, i.InputInt8(index)); in AssembleArchInstruction()
1880 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
1891 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
1904 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
1925 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2050 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2141 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2152 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2165 i.InputInt8(1) << 4); in AssembleArchInstruction()
2171 i.InputOperand(2), i.InputInt8(1) << 4); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/
Dcode-generator-impl.h61 int8_t InputInt8(size_t index) { in InputInt8() function
66 return bit_cast<uint8_t>(InputInt8(index)); in InputUint8()
/external/v8/src/compiler/backend/mips64/
Dcode-generator-mips64.cc1083 i.InputInt8(2)); in AssembleArchInstruction()
1088 i.InputInt8(2)); in AssembleArchInstruction()
1187 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1188 i.InputInt8(2)); in AssembleArchInstruction()
1191 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { in AssembleArchInstruction()
1192 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2)); in AssembleArchInstruction()
1194 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1195 i.InputInt8(2)); in AssembleArchInstruction()
1199 __ Dext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1200 i.InputInt8(2)); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/s390/
Dcode-generator-s390.cc2963 Operand(1 - i.InputInt8(1)), Condition(3)); in AssembleArchInstruction()
2966 Operand(i.InputInt8(1)), Condition(3)); in AssembleArchInstruction()
2973 Operand(3 - i.InputInt8(1)), Condition(2)); in AssembleArchInstruction()
2976 Operand(i.InputInt8(1)), Condition(2)); in AssembleArchInstruction()
2983 MemOperand(r0, 1 - i.InputInt8(1)), Condition(3)); in AssembleArchInstruction()
2986 MemOperand(r0, i.InputInt8(1)), Condition(3)); in AssembleArchInstruction()
2993 MemOperand(r0, 3 - i.InputInt8(1)), Condition(2)); in AssembleArchInstruction()
2996 MemOperand(r0, i.InputInt8(1)), Condition(2)); in AssembleArchInstruction()
3003 MemOperand(r0, 7 - i.InputInt8(1)), Condition(1)); in AssembleArchInstruction()
3006 MemOperand(r0, i.InputInt8(1)), Condition(1)); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc1161 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1162 i.InputInt8(2)); in AssembleArchInstruction()
1165 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { in AssembleArchInstruction()
1166 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2)); in AssembleArchInstruction()
1168 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1169 i.InputInt8(2)); in AssembleArchInstruction()
1193 i.InputInt8(2)); in AssembleArchInstruction()
2050 i.InputInt8(1)); in AssembleArchInstruction()
2060 __ insert_w(dst, i.InputInt8(1), i.InputRegister(2)); in AssembleArchInstruction()
2157 __ copy_u_w(kScratchReg, i.InputSimd128Register(0), i.InputInt8(1) * 2); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/arm/
Dcode-generator-arm.cc1186 __ bfc(i.OutputRegister(), i.InputInt8(1), i.InputInt8(2)); in AssembleArchInstruction()
1192 __ ubfx(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1193 i.InputInt8(2)); in AssembleArchInstruction()
1199 __ sbfx(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1200 i.InputInt8(2)); in AssembleArchInstruction()
1873 i.InputInt8(1)); in AssembleArchInstruction()
1878 i.InputDoubleRegister(2), i.InputInt8(1)); in AssembleArchInstruction()
2088 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2178 i.InputInt8(1)); in AssembleArchInstruction()
2183 i.InputFloatRegister(2), i.InputInt8(1)); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/arm64/
Dcode-generator-arm64.cc1983 i.InputInt8(1)); in AssembleArchInstruction()
1992 __ Mov(dst, i.InputInt8(1), i.InputSimd128Register(2).V2D(), 0); in AssembleArchInstruction()
2051 i.InputInt8(1)); in AssembleArchInstruction()
2060 __ Mov(dst, i.InputInt8(1), i.InputSimd128Register(2).V4S(), 0); in AssembleArchInstruction()
2124 i.InputInt8(1)); in AssembleArchInstruction()
2133 __ Mov(dst, i.InputInt8(1), i.InputRegister64(2)); in AssembleArchInstruction()
2217 i.InputInt8(1)); in AssembleArchInstruction()
2226 __ Mov(dst, i.InputInt8(1), i.InputRegister32(2)); in AssembleArchInstruction()
2299 i.InputInt8(1)); in AssembleArchInstruction()
2304 i.InputInt8(1)); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2284 Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2292 Operand((3 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2300 Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2307 Operand((3 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2314 Operand((7 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2321 Operand((7 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2328 Operand(15 - i.InputInt8(1))); in AssembleArchInstruction()
2334 Operand(15 - i.InputInt8(1))); in AssembleArchInstruction()
2346 Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2356 Operand((3 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
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/external/v8/src/compiler/backend/x64/
Dcode-generator-x64.cc2020 __ movb(operand, Immediate(i.InputInt8(index))); in AssembleArchInstruction()
2388 __ Pextrq(kScratchRegister, i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
2502 __ vshufps(i.OutputDoubleRegister(), src, src, i.InputInt8(1)); in AssembleArchInstruction()
2513 byte select = i.InputInt8(1) << 4 & 0x30; in AssembleArchInstruction()
2729 __ Pextrq(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
2824 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
3765 uint8_t lane = i.InputInt8(1) & 0x7; in AssembleArchInstruction()
3779 uint8_t lane = i.InputInt8(1) & 0xf; in AssembleArchInstruction()