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Searched refs:InsnType (Results 1 – 14 of 14) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp437 template <typename InsnType>
438 static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
441 template <typename InsnType>
442 static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address,
445 template <typename InsnType>
446 static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address,
449 template <typename InsnType>
450 static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address,
453 template <typename InsnType>
454 static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address,
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/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp437 template <typename InsnType>
438 static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
441 template <typename InsnType>
443 DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
446 template <typename InsnType>
448 DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address,
451 template <typename InsnType>
453 DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,
456 template <typename InsnType>
458 DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address,
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/external/capstone/arch/XCore/
DXCoreGenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
19 InsnType fieldMask; \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
607 #define DecodeToMCInst(fname,fieldname, InsnType) \
608 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
611 InsnType tmp; \
768 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/capstone/arch/Sparc/
DSparcGenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
19 InsnType fieldMask; \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
1456 #define DecodeToMCInst(fname,fieldname, InsnType) \
1457 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
1460 InsnType tmp; \
1947 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/capstone/arch/PowerPC/
DPPCGenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, \
20 InsnType fieldMask; \
21 if (numBits == sizeof(InsnType)*8) \
22 fieldMask = (InsnType)(-1LL); \
24 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
2244 #define DecodeToMCInst(fname,fieldname, InsnType) \
2245 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
2248 InsnType tmp; \
3195 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/capstone/arch/SystemZ/
DSystemZGenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
19 InsnType fieldMask; \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
1698 #define DecodeToMCInst(fname,fieldname, InsnType) \
1699 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
1702 InsnType tmp; \
2938 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCCodeEmitter.cpp474 unsigned InsnType = HexagonMCInstrInfo::getType(MCII, MI); in getFixupNoBits() local
477 if (InsnType == HexagonII::TypeEXTENDER) { in getFixupNoBits()
/external/capstone/arch/Mips/
DMipsGenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
19 InsnType fieldMask; \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
4698 #define DecodeToMCInst(fname,fieldname, InsnType) \
4699 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
4702 InsnType tmp; \
6508 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenDisassemblerTables.inc19 template<typename InsnType>
23 static InsnType fieldFromInstruction(InsnType insn, unsigned startBit,
25 assert(startBit + numBits <= (sizeof(InsnType)*8) &&
27 InsnType fieldMask;
28 if (numBits == sizeof(InsnType)*8)
29 fieldMask = (InsnType)(-1LL);
31 fieldMask = (((InsnType)1 << numBits) - 1) << startBit;
4756 template<typename InsnType>
4757 static DecodeStatus decodeToMCInst(DecodeStatus S, unsigned Idx, InsnType insn, MCInst &MI,
4760 InsnType tmp;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenDisassemblerTables.inc19 template<typename InsnType>
23 static InsnType fieldFromInstruction(InsnType insn, unsigned startBit,
25 assert(startBit + numBits <= (sizeof(InsnType)*8) &&
27 InsnType fieldMask;
28 if (numBits == sizeof(InsnType)*8)
29 fieldMask = (InsnType)(-1LL);
31 fieldMask = (((InsnType)1 << numBits) - 1) << startBit;
7558 template<typename InsnType>
7559 static DecodeStatus decodeToMCInst(DecodeStatus S, unsigned Idx, InsnType insn, MCInst &MI,
7562 InsnType tmp;
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/external/capstone/arch/ARM/
DARMGenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
19 InsnType fieldMask; \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
10089 #define DecodeToMCInst(fname,fieldname, InsnType) \
10090 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
10093 InsnType tmp; \
13454 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/capstone/arch/AArch64/
DAArch64GenDisassemblerTables.inc16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
19 InsnType fieldMask; \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
9611 #define DecodeToMCInst(fname,fieldname, InsnType) \
9612 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
9615 InsnType tmp; \
12669 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenDisassemblerTables.inc19 template<typename InsnType>
23 static InsnType fieldFromInstruction(InsnType insn, unsigned startBit,
25 assert(startBit + numBits <= (sizeof(InsnType)*8) &&
27 InsnType fieldMask;
28 if (numBits == sizeof(InsnType)*8)
29 fieldMask = (InsnType)(-1LL);
31 fieldMask = (((InsnType)1 << numBits) - 1) << startBit;
11365 template<typename InsnType>
11366 static DecodeStatus decodeToMCInst(DecodeStatus S, unsigned Idx, InsnType insn, MCInst &MI,
11369 InsnType tmp;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenDisassemblerTables.inc19 template<typename InsnType>
23 static InsnType fieldFromInstruction(InsnType insn, unsigned startBit,
25 assert(startBit + numBits <= (sizeof(InsnType)*8) &&
27 InsnType fieldMask;
28 if (numBits == sizeof(InsnType)*8)
29 fieldMask = (InsnType)(-1LL);
31 fieldMask = (((InsnType)1 << numBits) - 1) << startBit;
17693 template<typename InsnType>
17694 static DecodeStatus decodeToMCInst(DecodeStatus S, unsigned Idx, InsnType insn, MCInst &MI,
17697 InsnType tmp;
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