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Searched refs:Is4H (Results 1 – 6 of 6) sorted by relevance

/external/vixl/src/aarch64/
Dassembler-aarch64.cc2348 (vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEON3DifferentL()
2367 VIXL_ASSERT((vm.Is8B() && vd.Is8H()) || (vm.Is4H() && vd.Is4S()) || in NEON3DifferentW()
2379 VIXL_ASSERT((vd.Is8B() && vn.Is8H()) || (vd.Is4H() && vn.Is4S()) || in NEON3DifferentHN()
2418 V(sqdmlal, NEON_SQDMLAL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
2420 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
2422 V(sqdmull, NEON_SQDMULL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
2717 VIXL_ASSERT(vd.Is4H() | vd.Is8H()); in fmov()
3004 VIXL_ASSERT((vd.Is4S() && vn.Is4H()) || (vd.Is2D() && vn.Is2S())); in fcvtl()
3022 VIXL_ASSERT((vn.Is4S() && vd.Is4H()) || (vn.Is2D() && vd.Is2S())); in fcvtn()
3153 vd.Is1H() || vd.Is4H() || vd.Is8H()); in fcvtzs()
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Dmacro-assembler-aarch64.cc1109 } else if (vd.Is4H() || vd.Is8H()) { in Movi()
1497 if (vd.Is1H() || vd.Is4H() || vd.Is8H()) { in Fmov()
1534 if (vd.Is1H() || vd.Is4H() || vd.Is8H()) { in Fmov()
1580 VIXL_ASSERT(vd.Is1H() || vd.Is4H() || vd.Is8H()); in Fmov()
Doperands-aarch64.h380 bool Is4H() const { return (Is64Bits() && (lanes_ == 4)); } in Is4H() function
/external/v8/src/codegen/arm64/
Dassembler-arm64.cc1421 (vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEON3DifferentL()
1437 DCHECK((vm.Is8B() && vd.Is8H()) || (vm.Is4H() && vd.Is4S()) || in NEON3DifferentW()
1446 DCHECK((vd.Is8B() && vn.Is8H()) || (vd.Is4H() && vn.Is4S()) || in NEON3DifferentHN()
1483 V(sqdmlal, NEON_SQDMLAL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
1485 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
1487 V(sqdmull, NEON_SQDMULL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
1590 DCHECK((vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEONShiftImmediateL()
1611 DCHECK((vd.Is8B() && vn.Is8H()) || (vd.Is4H() && vn.Is4S()) || in NEONShiftImmediateN()
1948 DCHECK(vd.Is8B() || vd.Is16B() || vd.Is4H() || vd.Is8H()); in rev32()
1975 DCHECK((vn.Is8B() && vd.Is4H()) || (vn.Is4H() && vd.Is2S()) || in NEONAddlp()
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Dregister-arm64.h355 bool Is4H() const { return (Is64Bits() && (lane_count_ == 4)); } in Is4H() function
Dmacro-assembler-arm64.cc493 } else if (vd.Is4H() || vd.Is8H()) { in Movi()