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Searched refs:Is4S (Results 1 – 7 of 7) sorted by relevance

/external/v8/src/codegen/arm64/
Dassembler-arm64.cc1421 (vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEON3DifferentL()
1423 (vn.Is8H() && vd.Is4S()) || (vn.Is4S() && vd.Is2D())); in NEON3DifferentL()
1437 DCHECK((vm.Is8B() && vd.Is8H()) || (vm.Is4H() && vd.Is4S()) || in NEON3DifferentW()
1439 (vm.Is8H() && vd.Is4S()) || (vm.Is4S() && vd.Is2D())); in NEON3DifferentW()
1446 DCHECK((vd.Is8B() && vn.Is8H()) || (vd.Is4H() && vn.Is4S()) || in NEON3DifferentHN()
1448 (vd.Is8H() && vn.Is4S()) || (vd.Is4S() && vn.Is2D())); in NEON3DifferentHN()
1484 V(sqdmlal2, NEON_SQDMLAL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
1486 V(sqdmlsl2, NEON_SQDMLSL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
1488 V(sqdmull2, NEON_SQDMULL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S())
1590 DCHECK((vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEONShiftImmediateL()
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Dmacro-assembler-arm64-inl.h665 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Fmov()
697 DCHECK(vd.Is1S() || vd.Is2S() || vd.Is4S()); in Fmov()
Dregister-arm64.h358 bool Is4S() const { return (Is128Bits() && (lane_count_ == 4)); } in Is4S() function
Dmacro-assembler-arm64.cc496 } else if (vd.Is2S() || vd.Is4S()) { in Movi()
/external/vixl/src/aarch64/
Dassembler-aarch64.cc2348 (vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEON3DifferentL()
2350 (vn.Is8H() && vd.Is4S()) || (vn.Is4S() && vd.Is2D())); in NEON3DifferentL()
2367 VIXL_ASSERT((vm.Is8B() && vd.Is8H()) || (vm.Is4H() && vd.Is4S()) || in NEON3DifferentW()
2369 (vm.Is8H() && vd.Is4S()) || (vm.Is4S() && vd.Is2D())); in NEON3DifferentW()
2379 VIXL_ASSERT((vd.Is8B() && vn.Is8H()) || (vd.Is4H() && vn.Is4S()) || in NEON3DifferentHN()
2381 (vd.Is8H() && vn.Is4S()) || (vd.Is4S() && vn.Is2D())); in NEON3DifferentHN()
2419 V(sqdmlal2, NEON_SQDMLAL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
2421 V(sqdmlsl2, NEON_SQDMLSL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
2423 V(sqdmull2, NEON_SQDMULL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
2700 VIXL_ASSERT(vd.Is2S() | vd.Is4S()); in fmov()
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Dmacro-assembler-aarch64.cc1112 } else if (vd.Is2S() || vd.Is4S()) { in Movi()
1502 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Fmov()
1544 VIXL_ASSERT(vd.Is1S() || vd.Is2S() || vd.Is4S()); in Fmov()
1570 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Fmov()
Doperands-aarch64.h384 bool Is4S() const { return (Is128Bits() && (lanes_ == 4)); } in Is4S() function