Searched refs:IsPreIndex (Results 1 – 10 of 10) sorted by relevance
484 bool MemOperand::IsPreIndex() const { return addrmode_ == PreIndex; } in IsPreIndex() function in vixl::aarch64::MemOperand
891 bool IsPreIndex() const;
1948 } else if (addr.IsPreIndex() && !IsImmLSUnscaled(offset)) { in LS_MACRO_LIST()2000 VIXL_ASSERT(addr.IsPreIndex()); in LSPAIR_MACRO_LIST()2398 VIXL_ASSERT(!(mem.IsPreIndex() || mem.IsPostIndex())); in LoadStoreCPURegListHelper()
1137 if (addr.IsPreIndex()) { in LoadStorePair()5657 if (addr.IsPreIndex() && IsImmLSUnscaled(offset)) { in LoadStoreMemOperand()5683 VIXL_ASSERT(addr.IsImmediateOffset() || addr.IsPreIndex()); in LoadStorePAC()5686 if (addr.IsPreIndex()) { in LoadStorePAC()
855 bool IsPreIndex() const { return GetAddrMode() == PreIndex; } in IsPreIndex() function
5056 operand.IsPreIndex() && ((rn.GetCode() & 0xf) != 0xf) && in ldr()5099 if ((offset >= -4095) && (offset <= 4095) && operand.IsPreIndex() && in ldr()5175 if (operand.IsShiftValid() && operand.IsPreIndex() && cond.IsNotNever() && in ldr()5357 operand.IsPreIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrb()5398 if ((offset >= -4095) && (offset <= 4095) && operand.IsPreIndex() && in ldrb()5476 if (operand.IsShiftValid() && operand.IsPreIndex() && cond.IsNotNever() && in ldrb()5611 operand.IsPreIndex() && ((rn.GetCode() & 0xf) != 0xf) && in ldrd()5660 (offset >= -255) && (offset <= 255) && operand.IsPreIndex() && in ldrd()5715 operand.IsPreIndex() && cond.IsNotNever() && in ldrd()5987 operand.IsPreIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrh()[all …]
462 bool MemOperand::IsPreIndex() const { return addrmode_ == PreIndex; }
814 } else if (addr.IsPreIndex() && !IsImmLSUnscaled(offset)) { in LoadStoreMacro()850 DCHECK(addr.IsPreIndex()); in LoadStorePairMacro()
154 inline bool IsPreIndex() const;
1246 if (addr.IsPreIndex()) { in LoadStorePair()3971 if (addr.IsPreIndex()) { in LoadStore()