Searched refs:LBB1_3 (Results 1 – 25 of 39) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/ |
| D | double-previous-failure.ll | 34 ; RV32IFD-NEXT: bnez a0, .LBB1_3
41 ; RV32IFD-NEXT: beqz a0, .LBB1_3
45 ; RV32IFD-NEXT: .LBB1_3: # %if.then
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| D | zext-with-load-is-free.ll | 51 ; RV32I-NEXT: bne a2, a1, .LBB1_3
56 ; RV32I-NEXT: bne a0, a1, .LBB1_3
60 ; RV32I-NEXT: .LBB1_3: # %if.then
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| D | analyze-branch.ll | 53 ; RV32I-NEXT: beq a0, a1, .LBB1_3
60 ; RV32I-NEXT: .LBB1_3: # %true
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| /external/llvm/test/CodeGen/AArch64/ |
| D | aarch64-tbz.ll | 28 ; CHECK: cbz {{x[0-9]}}, {{.LBB1_3}}
29 ; CHECK: tbz w[[REG1:[0-9]+]], #3, {{.LBB1_3}}
31 ; CHECK-NOT: cbz [[REG2]], {{.LBB1_3}}
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | aarch64-tbz.ll | 28 ; CHECK: cbz {{x[0-9]}}, {{.LBB1_3}}
29 ; CHECK: tbz w[[REG1:[0-9]+]], #3, {{.LBB1_3}}
31 ; CHECK-NOT: cbz [[REG2]], {{.LBB1_3}}
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | and-su.ll | 41 ; CHECK-NEXT: je .LBB1_3
44 ; CHECK-NEXT: .LBB1_3: # %bb13
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| D | i128-mul.ll | 135 ; X86-NOBMI-NEXT: je .LBB1_3
210 ; X86-NOBMI-NEXT: .LBB1_3: # %for.end
230 ; X86-BMI-NEXT: je .LBB1_3
296 ; X86-BMI-NEXT: .LBB1_3: # %for.end
309 ; X64-NOBMI-NEXT: je .LBB1_3
327 ; X64-NOBMI-NEXT: .LBB1_3: # %for.end
334 ; X64-BMI-NEXT: je .LBB1_3
352 ; X64-BMI-NEXT: .LBB1_3: # %for.end
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| D | vec_setcc-2.ll | 80 ; SSE2-NEXT: je LBB1_3
96 ; SSE2-NEXT: LBB1_3: ## %for.end
102 ; SSE41-NEXT: je LBB1_3
119 ; SSE41-NEXT: LBB1_3: ## %for.end
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| D | shadow-stack.ll | 145 ; X86_64-NEXT: jne LBB1_3
152 ; X86_64-NEXT: LBB1_3: ## %if.end
194 ; X86-NEXT: jne LBB1_3
201 ; X86-NEXT: LBB1_3: ## %if.end
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| D | select-mmx.ll | 93 ; I32-NEXT: jmp .LBB1_3
96 ; I32-NEXT: .LBB1_3:
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| D | machine-cse.ll | 71 ; CHECK-NEXT: .LBB1_3: # %for.body53.us
73 ; CHECK-NEXT: jmp .LBB1_3
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| D | 3addr-16bit.ll | 95 ; X32-NEXT: jmp LBB1_3
98 ; X32-NEXT: LBB1_3: ## %bb1
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| D | lea-opt.ll | 93 ; ENABLED-NEXT: je .LBB1_3
101 ; ENABLED-NEXT: .LBB1_3: # %sw.bb.2
116 ; DISABLED-NEXT: je .LBB1_3
124 ; DISABLED-NEXT: .LBB1_3: # %sw.bb.2
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| D | seh-catchpad.ll | 138 ; CHECK-NEXT: .long .LBB1_3@IMGREL
142 ; CHECK-NEXT: .long .LBB1_3@IMGREL
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | sjlj.ll | 77 ; CHECK: bcl 20, 31, .LBB1_3
79 ; CHECK: #EH_SjLj_Setup .LBB1_3
82 ; CHECK: .LBB1_3:
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| /external/llvm/test/CodeGen/SPARC/ |
| D | sjlj.ll | 69 ; CHECK: ba .LBB1_3
73 ; CHECK:.LBB1_3: ! %entry
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-leaf-compact-unwind.s | 97 LBB1_3: ; %for.body4 label
103 b.ne LBB1_3
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-leaf-compact-unwind.s | 97 LBB1_3: ; %for.body4 label
103 b.ne LBB1_3
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| /external/llvm/lib/Target/ARM/ |
| D | README-Thumb.txt | 43 .long LBB1_3
57 .long LBB1_3
112 LBB1_3: @newFuncRoot
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | README-Thumb.txt | 43 .long LBB1_3
57 .long LBB1_3
112 LBB1_3: @newFuncRoot
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | shrink-wrapping.ll | 292 ; SHRINK-WRAP-64-STATIC-NEXT: j .LBB1_3
312 ; NO-SHRINK-WRAP-64-STATIC-NEXT: j .LBB1_3
323 ; SHRINK-WRAP-64-PIC-NEXT: bne $4, $1, .LBB1_3
337 ; SHRINK-WRAP-64-PIC-NEXT: .LBB1_3: # %if.then
359 ; NO-SHRINK-WRAP-64-PIC-NEXT: bne $4, $1, .LBB1_3
373 ; NO-SHRINK-WRAP-64-PIC-NEXT: .LBB1_3: # %if.then
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| /external/llvm/lib/Target/X86/ |
| D | README-X86-64.txt | 92 jbe LBB1_3 ## bb
100 LBB1_3: ## bb
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| /external/llvm/test/CodeGen/X86/ |
| D | seh-catchpad.ll | 138 ; CHECK-NEXT: .long .LBB1_3@IMGREL
142 ; CHECK-NEXT: .long .LBB1_3@IMGREL
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | README-X86-64.txt | 92 jbe LBB1_3 ## bb
100 LBB1_3: ## bb
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| /external/llvm/test/CodeGen/ARM/ |
| D | lsr-code-insertion.ll | 6 ;LBB1_3: @cond_true
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