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Searched refs:LRDef (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp579 SUnit *LRDef = LiveRegDefs[Reg]; in ListScheduleBottomUp() local
580 MVT VT = getPhysicalRegisterVT(LRDef->getNode(), Reg, TII); in ListScheduleBottomUp()
594 NewDef = CopyAndMoveSuccessors(LRDef); in ListScheduleBottomUp()
602 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); in ListScheduleBottomUp()
DScheduleDAGRRList.cpp1445 SUnit *LRDef = LiveRegDefs[Reg]; in PickNodeToScheduleBottomUp() local
1446 MVT VT = getPhysicalRegisterVT(LRDef->getNode(), Reg, TII); in PickNodeToScheduleBottomUp()
1460 NewDef = CopyAndMoveSuccessors(LRDef); in PickNodeToScheduleBottomUp()
1467 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); in PickNodeToScheduleBottomUp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp572 SUnit *LRDef = LiveRegDefs[Reg]; in ListScheduleBottomUp() local
573 MVT VT = getPhysicalRegisterVT(LRDef->getNode(), Reg, TII); in ListScheduleBottomUp()
587 NewDef = CopyAndMoveSuccessors(LRDef); in ListScheduleBottomUp()
595 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); in ListScheduleBottomUp()
DScheduleDAGRRList.cpp1538 SUnit *LRDef = LiveRegDefs[Reg]; in PickNodeToScheduleBottomUp() local
1539 MVT VT = getPhysicalRegisterVT(LRDef->getNode(), Reg, TII); in PickNodeToScheduleBottomUp()
1553 NewDef = CopyAndMoveSuccessors(LRDef); in PickNodeToScheduleBottomUp()
1560 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); in PickNodeToScheduleBottomUp()