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Searched refs:Ldrb (Results 1 – 18 of 18) sorted by relevance

/external/vixl/examples/aarch64/
Dadd2-vectors.cc74 __ Ldrb(w5, MemOperand(x0)); in GenerateAdd2Vectors() local
75 __ Ldrb(w6, MemOperand(x1, 1, PostIndex)); in GenerateAdd2Vectors() local
Dcrc-checksums.cc60 __ Ldrb(w3, MemOperand(x2, 1, PostIndex)); in GenerateCrc32() local
Dsum-array.cc52 __ Ldrb(w3, MemOperand(x2, 1, PostIndex)); // w3 = *(x2++) in GenerateSumArray() local
/external/v8/src/regexp/arm64/
Dregexp-macro-assembler-arm64.cc283 __ Ldrb(w10, MemOperand(characters_address, 1, PostIndex)); in CheckCharacters() local
363 __ Ldrb(w10, MemOperand(capture_start_address, 1, PostIndex)); in CheckNotBackReferenceIgnoreCase() local
364 __ Ldrb(w11, MemOperand(current_position_address, 1, PostIndex)); in CheckNotBackReferenceIgnoreCase() local
511 __ Ldrb(w10, MemOperand(capture_start_address, 1, PostIndex)); in CheckNotBackReference() local
512 __ Ldrb(w11, MemOperand(current_position_address, 1, PostIndex)); in CheckNotBackReference() local
604 __ Ldrb(w11, MemOperand(x11, w10, UXTW)); in CheckBitInTable() local
685 __ Ldrb(w10, MemOperand(x10, current_character(), UXTW)); in CheckSpecialCharacterClass() local
698 __ Ldrb(w10, MemOperand(x10, current_character(), UXTW)); in CheckSpecialCharacterClass() local
1657 __ Ldrb(current_character(), MemOperand(input_end(), offset, SXTW)); in LoadCurrentCharacterUnchecked() local
/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc759 __ Ldrb(r0, MemOperand(r0)); in TEST() local
760 __ Ldrb(r1, MemOperand(r1)); in TEST() local
761 __ Ldrb(r2, MemOperand(r2)); in TEST() local
762 __ Ldrb(r3, MemOperand(r3)); in TEST() local
1729 __ Ldrb(r1, &lit); in TEST() local
1814 __ Ldrb(r5, &l4); in TEST() local
1869 __ Ldrb(ge, r5, &l4); in TEST() local
1870 __ Ldrb(lt, r5, &l4_not_taken); in TEST() local
1908 {&MacroAssembler::Ldrb, r4, 4095, 4095, 0x12345678, 0x00000078},
2048 __ Ldrb(r1, &hello_string); in TEST() local
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Dtest-disasm-a32.cc3379 COMPARE_T32(Ldrb(eq, r6, MemOperand(r7, 31)), in TEST()
3383 COMPARE_T32(Ldrb(eq, r6, MemOperand(r7, 32)), in TEST()
3388 COMPARE_T32(Ldrb(eq, r5, MemOperand(r6, r7)), in TEST()
3392 COMPARE_T32(Ldrb(eq, r6, MemOperand(r9)), in TEST()
4256 COMPARE_BOTH(Ldrb(r0, MemOperand(pc, minus, 0)), "ldrb r0, [pc, #-0]\n"); in TEST()
Dtest-simulator-cond-rd-memop-immediate-8192-a32.cc117 M(Ldrb) \
Dtest-simulator-cond-rd-memop-rs-a32.cc117 M(Ldrb) \
Dtest-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc117 M(Ldrb) \
Dtest-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc117 M(Ldrb) \
/external/v8/src/builtins/arm64/
Dbuiltins-arm64.cc1109 __ Ldrb(bytecode, MemOperand(bytecode_array, bytecode_offset)); in AdvanceBytecodeOffsetOrReturn() local
1311 __ Ldrb(x23, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEntryTrampoline() local
1330 __ Ldrb(x1, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEntryTrampoline() local
1619 __ Ldrb(x23, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEnterBytecode() local
1645 __ Ldrb(x1, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEnterBytecodeAdvance() local
2237 __ Ldrb(x5, FieldMemOperand(x5, Map::kBitFieldOffset)); in Generate_CallOrConstructForwardVarargs() local
2595 __ Ldrb(x4, FieldMemOperand(x4, Map::kBitFieldOffset)); in Generate_Call() local
2698 __ Ldrb(x2, FieldMemOperand(x4, Map::kBitFieldOffset)); in Generate_Construct() local
3303 __ Ldrb(w10, MemOperand(x10)); in CallApiFunctionAndReturn() local
/external/v8/src/codegen/arm64/
Dmacro-assembler-arm64.cc1477 Ldrb(temp, FieldMemOperand(temp, Map::kBitFieldOffset)); in AssertConstructor()
2679 Ldrb(result, FieldMemOperand(map, Map::kBitField2Offset)); in LoadElementsKindFromMap()
Dmacro-assembler-arm64.h38 V(Ldrb, Register&, rt, LDRB_w) \
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.h596 void Ldrb(Condition cond, Register rt, RawLiteral* literal) { in Ldrb() function
615 void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); } in Ldrb() function
2097 void Ldrb(Condition cond, Register rt, const MemOperand& operand) { in Ldrb() function
2117 void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); } in Ldrb() function
/external/v8/src/wasm/baseline/arm64/
Dliftoff-assembler-arm64.h387 Ldrb(dst.gp().W(), src_op); in Load()
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc2879 __ Ldrb(w3, MemOperand(x17, 1)); in TEST() local
2977 __ Ldrb(w3, MemOperand(x23, 1, PreIndex)); in TEST() local
3035 __ Ldrb(w3, MemOperand(x23, 1, PostIndex)); in TEST() local
3737 __ Ldrb(w3, MemOperand(x19, -1)); in TEST() local
/external/v8/src/compiler/backend/arm64/
Dcode-generator-arm64.cc1719 __ Ldrb(i.OutputRegister(), i.MemoryOperand()); in AssembleArchInstruction() local
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h50 V(Ldrb, Register&, rt, LDRB_w) \