Searched refs:LoadStoreOp (Results 1 – 21 of 21) sorted by relevance
| /external/v8/src/codegen/arm64/ |
| D | instructions-arm64.cc | 21 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad()
52 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore()
156 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
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| D | instructions-arm64.h | 53 unsigned CalcLSDataSize(LoadStoreOp op);
147 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in SizeLS()
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| D | assembler-arm64-inl.h | 765 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) {
787 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) {
1034 unsigned Assembler::CalcLSDataSize(LoadStoreOp op) {
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| D | assembler-arm64.h | 2180 inline static unsigned CalcLSDataSize(LoadStoreOp op);
2430 void LoadStore(const CPURegister& rt, const MemOperand& addr, LoadStoreOp op);
2478 static inline LoadStoreOp LoadOpFor(const CPURegister& rt);
2481 static inline LoadStoreOp StoreOpFor(const CPURegister& rt);
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| D | constants-arm64.h | 914 enum LoadStoreOp : uint32_t { enum
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| D | macro-assembler-arm64.h | 1428 LoadStoreOp op);
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| D | macro-assembler-arm64.cc | 795 const MemOperand& addr, LoadStoreOp op) { in LoadStoreMacro()
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| D | assembler-arm64.cc | 3932 LoadStoreOp op) { in LoadStore()
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| /external/vixl/src/aarch64/ |
| D | instructions-aarch64.cc | 55 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad()
87 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore()
231 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
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| D | instructions-aarch64.h | 139 unsigned CalcLSDataSize(LoadStoreOp op);
284 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in GetSizeLS()
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| D | assembler-aarch64.h | 4252 LoadStoreOp op,
4335 static LoadStoreOp LoadOpFor(const CPURegister& rt);
4338 static LoadStoreOp StoreOpFor(const CPURegister& rt);
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| D | constants-aarch64.h | 992 enum LoadStoreOp { enum
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| D | assembler-aarch64.cc | 5673 LoadStoreOp op, in LoadStore()
6029 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) { in LoadOpFor()
6052 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) { in StoreOpFor()
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| D | macro-assembler-aarch64.cc | 1923 LoadStoreOp op) { in LS_MACRO_LIST()
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| D | simulator-aarch64.cc | 1627 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask)); in LoadStoreHelper()
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| D | macro-assembler-aarch64.h | 780 LoadStoreOp op);
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 197 unsigned LoadStoreOp, const MachineOperand *SrcDst,
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| D | SIRegisterInfo.cpp | 411 unsigned LoadStoreOp, in buildScratchLoadStore() argument
476 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildScratchLoadStore()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 233 unsigned LoadStoreOp,
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| D | SIRegisterInfo.cpp | 492 int LoadStoreOp = IsStore ? in buildMUBUFOffsetLoadStore() local
494 if (LoadStoreOp == -1) in buildMUBUFOffsetLoadStore()
498 MachineInstrBuilder NewMI = BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildMUBUFOffsetLoadStore()
516 unsigned LoadStoreOp, in buildSpillLoadStore() argument
531 const MCInstrDesc &Desc = TII->get(LoadStoreOp); in buildSpillLoadStore()
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| /external/v8/src/execution/arm64/ |
| D | simulator-arm64.cc | 1825 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask)); in LoadStoreHelper()
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