/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenInstrInfo.inc | 4695 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 4696 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 4697 …{ 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4698 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4699 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4700 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4701 …{ 6, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 4702 …{ 7, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 4703 …{ 8, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… 4704 …{ 9, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove),… [all …]
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/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 92 namespace MCID { 200 bool isVariadic() const { return Flags & (1 << MCID::Variadic); } in isVariadic() 204 bool hasOptionalDef() const { return Flags & (1 << MCID::HasOptionalDef); } in hasOptionalDef() 208 bool isPseudo() const { return Flags & (1 << MCID::Pseudo); } in isPseudo() 211 bool isReturn() const { return Flags & (1 << MCID::Return); } in isReturn() 214 bool isCall() const { return Flags & (1 << MCID::Call); } in isCall() 219 bool isBarrier() const { return Flags & (1 << MCID::Barrier); } in isBarrier() 227 bool isTerminator() const { return Flags & (1 << MCID::Terminator); } in isTerminator() 233 bool isBranch() const { return Flags & (1 << MCID::Branch); } in isBranch() 237 bool isIndirectBranch() const { return Flags & (1 << MCID::IndirectBranch); } in isIndirectBranch() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 113 namespace MCID { 233 bool isVariadic() const { return Flags & (1ULL << MCID::Variadic); } in isVariadic() 237 bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); } in hasOptionalDef() 241 bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); } in isPseudo() 244 bool isReturn() const { return Flags & (1ULL << MCID::Return); } in isReturn() 247 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd() 250 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap() 253 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg() 256 bool isCall() const { return Flags & (1ULL << MCID::Call); } in isCall() 261 bool isBarrier() const { return Flags & (1ULL << MCID::Barrier); } in isBarrier() [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenInstrInfo.inc | 4060 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 4061 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 4062 …{ 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4063 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4064 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4065 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4066 …{ 6, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 4067 …{ 7, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 4068 …{ 8, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… 4069 …{ 9, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove),… [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenInstrInfo.inc | 2846 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 2847 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 2848 …{ 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2849 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2850 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2851 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2852 …{ 6, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 2853 …{ 7, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 2854 …{ 8, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… 2855 …{ 9, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove),… [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenInstrInfo.inc | 17814 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 17815 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 17816 …{ 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 17817 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 17818 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 17819 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 17820 …{ 6, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 17821 …{ 7, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 17822 …{ 8, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… 17823 …{ 9, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove),… [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenInstrInfo.inc | 5902 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 5903 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 5904 …{ 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5905 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5906 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5907 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5908 …{ 6, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 5909 …{ 7, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 5910 …{ 8, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… 5911 …{ 9, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove),… [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstrBuilder.h | 243 const MCInstrDesc &MCID) { in BuildMI() argument 244 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI() 250 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI() argument 251 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI() 260 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument 263 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI() 276 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument 279 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI() 285 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument 290 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI() [all …]
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D | MachineInstr.h | 78 const MCInstrDesc *MCID; // Instruction descriptor. 133 MachineInstr(MachineFunction &, const MCInstrDesc &MCID, DebugLoc dl, 283 const MCInstrDesc &getDesc() const { return *MCID; } 286 unsigned getOpcode() const { return MCID->Opcode; } 418 return hasProperty(MCID::Variadic, Type); 424 return hasProperty(MCID::HasOptionalDef, Type); 430 return hasProperty(MCID::Pseudo, Type); 434 return hasProperty(MCID::Return, Type); 438 return hasProperty(MCID::Call, Type); 445 return hasProperty(MCID::Barrier, Type); [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.cpp | 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local 32 if (!MCID) in isLoadAfterStore() 35 if (!MCID->mayLoad()) in isLoadAfterStore() 57 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local 58 if (!MCID) in isBCTRAfterSet() 61 if (!MCID->isBranch()) in isBCTRAfterSet() 87 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst() argument 92 unsigned IIC = MCID->getSchedClass(); in mustComeFirst() 125 if (NSlots == 1 && PPC::getNonRecordFormOpcode(MCID->getOpcode()) != -1) in mustComeFirst() 149 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.cpp | 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local 32 if (!MCID) in isLoadAfterStore() 35 if (!MCID->mayLoad()) in isLoadAfterStore() 57 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local 58 if (!MCID) in isBCTRAfterSet() 61 if (!MCID->isBranch()) in isBCTRAfterSet() 87 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst() argument 92 unsigned IIC = MCID->getSchedClass(); in mustComeFirst() 125 if (NSlots == 1 && PPC::getNonRecordFormOpcode(MCID->getOpcode()) != -1) in mustComeFirst() 149 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | MachineInstrBuilder.h | 300 const MCInstrDesc &MCID) { in BuildMI() argument 301 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI() 307 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI() argument 308 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI() 317 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument 320 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI() 333 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument 336 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI() 342 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument 347 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI() [all …]
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D | MachineInstr.h | 101 const MCInstrDesc *MCID; // Instruction descriptor. 308 const MCInstrDesc &getDesc() const { return *MCID; } 311 unsigned getOpcode() const { return MCID->Opcode; } 327 return getNumExplicitDefs() + MCID->getNumImplicitDefs(); 466 return hasProperty(MCID::Variadic, Type); 472 return hasProperty(MCID::HasOptionalDef, Type); 478 return hasProperty(MCID::Pseudo, Type); 482 return hasProperty(MCID::Return, Type); 486 return hasProperty(MCID::Call, Type); 493 return hasProperty(MCID::Barrier, Type); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/ |
D | MachineInstrTest.cpp | 111 MCInstrDesc MCID = { in TEST() local 112 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST() 120 auto MI1 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() 124 auto MI2 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() 140 auto MI3 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() 144 auto MI4 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() 180 MCInstrDesc MCID = { in TEST() local 181 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST() 193 auto VD1VU = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() 199 auto VD2VU = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
D | ValueMapper.cpp | 87 unsigned MCID : 29; member 160 unsigned MCID); 164 unsigned MCID); 166 unsigned MCID); 167 void scheduleRemapFunction(Function &F, unsigned MCID); 835 CurrentMCID = E.MCID; in flush() 999 unsigned MCID) { in scheduleMapGlobalInitializer() argument 1001 assert(MCID < MCs.size() && "Invalid mapping context"); in scheduleMapGlobalInitializer() 1005 WE.MCID = MCID; in scheduleMapGlobalInitializer() 1015 unsigned MCID) { in scheduleMapAppendingVariable() argument [all …]
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXReplaceImageHandles.cpp | 81 const MCInstrDesc &MCID = MI.getDesc(); in processInstr() local 83 if (MCID.TSFlags & NVPTXII::IsTexFlag) { in processInstr() 89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) { in processInstr() 95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) { in processInstr() 97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1); in processInstr() 105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) { in processInstr() 112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) { in processInstr()
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/external/llvm/lib/CodeGen/ |
D | ScoreboardHazardRecognizer.cpp | 120 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local 121 if (!MCID) { in getHazardType() 125 unsigned idx = MCID->getSchedClass(); in getHazardType() 176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local 177 assert(MCID && "The scheduler must filter non-machineinstrs"); in EmitInstruction() 178 if (DAG->TII->isZeroCost(MCID->Opcode)) in EmitInstruction() 185 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXReplaceImageHandles.cpp | 81 const MCInstrDesc &MCID = MI.getDesc(); in processInstr() local 83 if (MCID.TSFlags & NVPTXII::IsTexFlag) { in processInstr() 89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) { in processInstr() 95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) { in processInstr() 97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1); in processInstr() 105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) { in processInstr() 112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) { in processInstr()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | ScoreboardHazardRecognizer.cpp | 123 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local 124 if (!MCID) { in getHazardType() 128 unsigned idx = MCID->getSchedClass(); in getHazardType() 179 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local 180 assert(MCID && "The scheduler must filter non-machineinstrs"); in EmitInstruction() 181 if (DAG->TII->isZeroCost(MCID->Opcode)) in EmitInstruction() 188 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
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/external/llvm/lib/Target/ARM/ |
D | Thumb2SizeReduction.cpp | 228 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) { in HasImplicitCPSRDef() argument 229 for (const MCPhysReg *Regs = MCID.getImplicitDefs(); *Regs; ++Regs) in HasImplicitCPSRDef() 615 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() local 616 if (MCID.hasOptionalDef() && in ReduceSpecial() 617 MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR) in ReduceSpecial() 765 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() local 766 if (MCID.hasOptionalDef()) { in ReduceTo2Addr() 767 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() 793 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() 795 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr() [all …]
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D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local 23 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard() 26 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard() 43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() local 44 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
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/external/llvm/lib/Transforms/Utils/ |
D | ValueMapper.cpp | 76 unsigned MCID : 29; member 148 unsigned MCID); 152 unsigned MCID); 154 unsigned MCID); 155 void scheduleRemapFunction(Function &F, unsigned MCID); 820 CurrentMCID = E.MCID; in flush() 980 unsigned MCID) { in scheduleMapGlobalInitializer() argument 982 assert(MCID < MCs.size() && "Invalid mapping context"); in scheduleMapGlobalInitializer() 986 WE.MCID = MCID; in scheduleMapGlobalInitializer() 996 unsigned MCID) { in scheduleMapAppendingVariable() argument [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local 23 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard() 26 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard() 43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() local 44 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
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D | Thumb2SizeReduction.cpp | 254 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) { in HasImplicitCPSRDef() argument 255 for (const MCPhysReg *Regs = MCID.getImplicitDefs(); *Regs; ++Regs) in HasImplicitCPSRDef() 645 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() local 646 if (MCID.hasOptionalDef() && in ReduceSpecial() 647 MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR) in ReduceSpecial() 795 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() local 796 if (MCID.hasOptionalDef()) { in ReduceTo2Addr() 797 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() 819 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() 821 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr() [all …]
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/external/tcpdump/tests/ |
D | evb.out | 5 v3len 64, MCID Name Default, rev 0, 12 v3len 64, MCID Name Default, rev 0, 19 v3len 64, MCID Name Default, rev 0, 67 v3len 64, MCID Name Default, rev 0, 74 v3len 64, MCID Name Default, rev 0, 81 v3len 64, MCID Name Default, rev 0, 88 v3len 64, MCID Name Default, rev 0, 95 v3len 64, MCID Name Default, rev 0, 102 v3len 64, MCID Name Default, rev 0, 109 v3len 64, MCID Name Default, rev 0, [all …]
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