1 /*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <string.h>
9
10 #include <platform_def.h>
11
12 #include <arch_helpers.h>
13 #include <common/bl_common.h>
14 #include <common/debug.h>
15 #include <drivers/console.h>
16 #include <lib/mmio.h>
17 #include <plat/common/platform.h>
18
19 #include <hi6220.h>
20
21 #define MCU_SECTION_MAX 30
22
23 enum MCU_IMAGE_SEC_TYPE_ENUM {
24 MCU_IMAGE_SEC_TYPE_TEXT = 0, /* text section */
25 MCU_IMAGE_SEC_TYPE_DATA, /* data section */
26 MCU_IMAGE_SEC_TYPE_BUTT
27 };
28
29 enum MCU_IMAGE_SEC_LOAD_ENUM {
30 MCU_IMAGE_SEC_LOAD_STATIC = 0,
31 MCU_IMAGE_SEC_LOAD_DYNAMIC,
32 MCU_IMAGE_SEC_LOAD_BUFFER,
33 MCU_IMAGE_SEC_LOAD_MODEM_ENTRY,
34 MCU_IMAGE_SEC_LOAD_BUTT
35 };
36
37 struct mcu_image_sec {
38 unsigned short serial;
39 char type;
40 char load_attr;
41 uint32_t src_offset; /* offset in image */
42 uint32_t dst_offset; /* offset in memory */
43 uint32_t size;
44 };
45
46 struct mcu_image_head {
47 char time_stamp[24];
48 uint32_t image_size;
49 uint32_t secs_num;
50 struct mcu_image_sec secs[MCU_SECTION_MAX];
51 };
52
53 #define SOC_SRAM_M3_BASE_ADDR (0xF6000000)
54
55 #define MCU_SRAM_SIZE (0x0000C000)
56 #define MCU_CACHE_SIZE (0x00004000)
57 #define MCU_CODE_SIZE (MCU_SRAM_SIZE - MCU_CACHE_SIZE)
58
59 #define MCU_SYS_MEM_ADDR (0x05E00000)
60 #define MCU_SYS_MEM_SIZE (0x00100000)
61
mcu2ap_addr(uint32_t mcu_addr)62 static uint32_t mcu2ap_addr(uint32_t mcu_addr)
63 {
64 if (mcu_addr < MCU_CODE_SIZE)
65 return (mcu_addr + SOC_SRAM_M3_BASE_ADDR);
66 else if ((mcu_addr >= MCU_SRAM_SIZE) &&
67 (mcu_addr < MCU_SRAM_SIZE + MCU_SYS_MEM_SIZE))
68 return mcu_addr - MCU_SRAM_SIZE + MCU_SYS_MEM_ADDR;
69 else
70 return mcu_addr;
71 }
72
is_binary_header_invalid(struct mcu_image_head * head,unsigned int length)73 static int is_binary_header_invalid(struct mcu_image_head *head,
74 unsigned int length)
75 {
76 /* invalid cases */
77 if ((head->image_size == 0) ||
78 (head->image_size > length) ||
79 (head->secs_num > MCU_SECTION_MAX) ||
80 (head->secs_num == 0))
81 return 1;
82
83 return 0;
84 }
85
is_binary_section_invalid(struct mcu_image_sec * sec,struct mcu_image_head * head)86 static int is_binary_section_invalid(struct mcu_image_sec *sec,
87 struct mcu_image_head *head)
88 {
89 unsigned long ap_dst_offset = 0;
90
91 if ((sec->serial >= head->secs_num) ||
92 (sec->src_offset + sec->size > head->image_size))
93 return 1;
94
95 if ((sec->type >= MCU_IMAGE_SEC_TYPE_BUTT) ||
96 (sec->load_attr >= MCU_IMAGE_SEC_LOAD_BUTT))
97 return 1;
98
99 ap_dst_offset = mcu2ap_addr(sec->dst_offset);
100 if ((ap_dst_offset >= SOC_SRAM_M3_BASE_ADDR) &&
101 (ap_dst_offset < SOC_SRAM_M3_BASE_ADDR + 0x20000 - sec->size))
102 return 0;
103 else if ((ap_dst_offset >= MCU_SYS_MEM_ADDR) &&
104 (ap_dst_offset < MCU_SYS_MEM_ADDR + MCU_SYS_MEM_SIZE - sec->size))
105 return 0;
106 else if ((ap_dst_offset >= 0xfff8e000) &&
107 (ap_dst_offset < 0xfff91c00 - sec->size))
108 return 0;
109
110 ERROR("%s: mcu destination address invalid.\n", __func__);
111 ERROR("%s: number=%d, dst offset=%d size=%d\n",
112 __func__, sec->serial, sec->dst_offset, sec->size);
113 return 1;
114 }
115
hisi_mcu_enable_sram(void)116 void hisi_mcu_enable_sram(void)
117 {
118 mmio_write_32(AO_SC_PERIPH_CLKEN4,
119 AO_SC_PERIPH_CLKEN4_HCLK_IPC_S |
120 AO_SC_PERIPH_CLKEN4_HCLK_IPC_NS);
121
122 /* set register to enable dvfs which is used by mcu */
123 mmio_write_32(PERI_SC_RESERVED8_ADDR, 0x0A001022);
124
125 /* mcu mem is powered on, need de-assert reset */
126 mmio_write_32(AO_SC_PERIPH_RSTDIS4,
127 AO_SC_PERIPH_RSTDIS4_RESET_MCU_ECTR_N);
128
129 /* enable mcu hclk */
130 mmio_write_32(AO_SC_PERIPH_CLKEN4,
131 AO_SC_PERIPH_CLKEN4_HCLK_MCU |
132 AO_SC_PERIPH_CLKEN4_CLK_MCU_DAP);
133 }
134
hisi_mcu_start_run(void)135 void hisi_mcu_start_run(void)
136 {
137 unsigned int val;
138
139 /* set mcu ddr remap configuration */
140 mmio_write_32(AO_SC_MCU_SUBSYS_CTRL2, MCU_SYS_MEM_ADDR);
141
142 /* de-assert reset for mcu and to run */
143 mmio_write_32(AO_SC_PERIPH_RSTDIS4,
144 AO_SC_PERIPH_RSTDIS4_RESET_MCU_ECTR_N |
145 AO_SC_PERIPH_RSTDIS4_RESET_MCU_SYS_N |
146 AO_SC_PERIPH_RSTDIS4_RESET_MCU_POR_N |
147 AO_SC_PERIPH_RSTDIS4_RESET_MCU_DAP_N);
148
149 val = mmio_read_32(AO_SC_SYS_CTRL2);
150 mmio_write_32(AO_SC_SYS_CTRL2,
151 val | AO_SC_SYS_CTRL2_GLB_SRST_STAT_CLEAR);
152
153 INFO("%s: AO_SC_SYS_CTRL2=%x\n", __func__,
154 mmio_read_32(AO_SC_SYS_CTRL2));
155 }
156
hisi_mcu_load_image(uintptr_t image_base,uint32_t image_size)157 int hisi_mcu_load_image(uintptr_t image_base, uint32_t image_size)
158 {
159 unsigned int i;
160 struct mcu_image_head *head;
161 char *buf;
162
163 head = (struct mcu_image_head *)image_base;
164 if (is_binary_header_invalid(head, image_size)) {
165 ERROR("Invalid %s image header.\n", head->time_stamp);
166 return -1;
167 }
168
169 buf = (char *)head;
170 for (i = 0; i < head->secs_num; i++) {
171
172 int *src, *dst;
173
174 /* check the sections */
175 if (is_binary_section_invalid(&head->secs[i], head)) {
176 ERROR("Invalid mcu section.\n");
177 return -1;
178 }
179
180 /* check if the section is static-loaded */
181 if (head->secs[i].load_attr != MCU_IMAGE_SEC_LOAD_STATIC)
182 continue;
183
184 /* copy the sections */
185 src = (int *)(intptr_t)(buf + head->secs[i].src_offset);
186 dst = (int *)(intptr_t)mcu2ap_addr(head->secs[i].dst_offset);
187
188 memcpy((void *)dst, (void *)src, head->secs[i].size);
189
190 INFO("%s: mcu sections %d:\n", __func__, i);
191 INFO("%s: src = 0x%x\n",
192 __func__, (unsigned int)(uintptr_t)src);
193 INFO("%s: dst = 0x%x\n",
194 __func__, (unsigned int)(uintptr_t)dst);
195 INFO("%s: size = %d\n", __func__, head->secs[i].size);
196
197 INFO("%s: [SRC 0x%x] 0x%x 0x%x 0x%x 0x%x\n",
198 __func__, (unsigned int)(uintptr_t)src,
199 src[0], src[1], src[2], src[3]);
200 INFO("%s: [DST 0x%x] 0x%x 0x%x 0x%x 0x%x\n",
201 __func__, (unsigned int)(uintptr_t)dst,
202 dst[0], dst[1], dst[2], dst[3]);
203 }
204
205 return 0;
206 }
207