Searched refs:MPIDR_AFF1_SHIFT (Results 1 – 25 of 32) sorted by relevance
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| /external/arm-trusted-firmware/plat/arm/common/ |
| D | arm_topology.c | 26 (MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) | in arm_check_mpidr()
30 cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
34 cluster_id = (unsigned int) ((mpidr >> MPIDR_AFF1_SHIFT) & in arm_check_mpidr()
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| /external/arm-trusted-firmware/drivers/arm/css/scpi/ |
| D | css_scpi.c | 135 state |= (mpidr >> MPIDR_AFF1_SHIFT) & 0x0f; /* CPU ID */ in scpi_set_css_power_state()
192 cpu = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()
196 cluster = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()
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| /external/arm-trusted-firmware/plat/intel/soc/common/ |
| D | socfpga_topology.c | 36 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/layerscape/common/ |
| D | ls_topology.c | 20 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in ls_check_mpidr()
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| /external/arm-trusted-firmware/plat/arm/board/a5ds/ |
| D | a5ds_topology.c | 38 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/rpi/common/ |
| D | rpi3_topology.c | 46 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/amlogic/common/ |
| D | aml_topology.c | 43 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/qemu/common/ |
| D | topology.c | 47 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_topology.c | 52 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hikey_topology.c | 52 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/mediatek/mt8183/ |
| D | plat_topology.c | 45 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/mediatek/mt8173/ |
| D | plat_topology.c | 46 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_topology.c | 31 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/socionext/synquacer/ |
| D | sq_topology.c | 19 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/renesas/rcar/ |
| D | plat_topology.c | 33 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_topology.c | 26 cluster_id = (mpidr >> (u_register_t)MPIDR_AFF1_SHIFT) & in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/arm/board/n1sdp/aarch64/ |
| D | n1sdp_helper.S | 42 ubfx x1, x4, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/css/sgi/aarch64/ |
| D | sgi_helper.S | 42 ubfx x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/board/corstone700/ |
| D | corstone700_helpers.S | 90 ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/css/sgm/aarch64/ |
| D | css_sgm_helpers.S | 43 ubfx x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/drivers/arm/css/scp/ |
| D | css_pm_scpi.c | 103 element = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in css_scp_get_power_state()
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| /external/arm-trusted-firmware/plat/arm/board/a5ds/aarch32/ |
| D | a5ds_helpers.S | 116 ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/board/fvp/aarch32/ |
| D | fvp_helpers.S | 133 ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/ti/k3/common/ |
| D | k3_helpers.S | 75 lsr x1, x1, #MPIDR_AFF1_SHIFT
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| /external/arm-trusted-firmware/plat/allwinner/common/ |
| D | sunxi_cpu_ops.c | 116 u_register_t mpidr = (cluster << MPIDR_AFF1_SHIFT) | in sunxi_disable_secondary_cpus()
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