Home
last modified time | relevance | path

Searched refs:MTCTR (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp402 if (Opcode == PPC::MTCTR || Opcode == PPC::MTCTR8) HasCTRSet = true; in EmitInstruction()
DPPCISelLowering.h121 MTCTR, enumerator
DPPCISelDAGToDAG.cpp2979 unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; in Select()
DPPCISelLowering.cpp1040 case PPCISD::MTCTR: return "PPCISD::MTCTR"; in getTargetNodeName()
4490 Chain = DAG.getNode(PPCISD::MTCTR, dl, NodeTys, in PrepareCall()
8881 TII->get(PVT == MVT::i64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(Tmp); in emitEHSjLjLongJmp()
DPPCInstrInfo.td191 def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall,
2315 def MTCTR : XFXForm_7_ext<31, 467, 9, (outs), (ins gprc:$rS),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp402 if (Opcode == PPC::MTCTR || Opcode == PPC::MTCTR8) HasCTRSet = true; in EmitInstruction()
DPPCISelLowering.h165 MTCTR, enumerator
DP9InstrResources.td923 (instregex "MTCTR(8)?(loop)?$"),
DPPCISelLowering.cpp1292 case PPCISD::MTCTR: return "PPCISD::MTCTR"; in getTargetNodeName()
5021 Chain = DAG.getNode(PPCISD::MTCTR, dl, NodeTys, in PrepareCall()
10205 TII->get(PVT == MVT::i64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(Tmp); in emitEHSjLjLongJmp()
DPPCInstrInfo.td241 def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall,
2556 def MTCTR : XFXForm_7_ext<31, 467, 9, (outs), (ins gprc:$rS),
DPPCISelDAGToDAG.cpp4777 unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; in Select()
/external/pcre/dist2/src/sljit/
DsljitNativePPC_common.c189 #define MTCTR (HI(31) | LO(467) | 0x90000) macro
1895 PTR_FAIL_IF(push_inst(compiler, MTCTR | S(TMP_CALL_REG))); in sljit_emit_jump()
1957 FAIL_IF(push_inst(compiler, MTCTR | S(src_r))); in sljit_emit_ijump()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenFastISel.inc1531 // FastEmit functions for PPCISD::MTCTR.
1536 return fastEmitInst_r(PPC::MTCTR, &PPC::GPRCRegClass, Op0, Op0IsKill);
1727 case PPCISD::MTCTR: return fastEmit_PPCISD_MTCTR_r(VT, RetVT, Op0, Op0IsKill);
DPPCGenMCCodeEmitter.inc1101 UINT64_C(2080965542), // MTCTR
4068 case PPC::MTCTR:
6690 0, // MTCTR = 1088
DPPCGenAsmWriter.inc2706 549270U, // MTCTR
4864 0U, // MTCTR
DPPCGenInstrInfo.inc1103 MTCTR = 1088,
3934 …0, 4, 226, 0, 0x9ULL, nullptr, ImplicitList9, OperandInfo149, -1 ,nullptr }, // Inst #1088 = MTCTR
DPPCGenDisassemblerTables.inc1596 /* 7472 */ MCD::OPC_Decode, 192, 8, 51, // Opcode: MTCTR
DPPCGenAsmMatcher.inc5902 { 7284 /* mtctr */, PPC::MTCTR, Convert__RegGPRC1_0, 0, { MCK_RegGPRC }, },
DPPCGenDAGISel.inc27795 /* 66190*/ /*SwitchOpcode*/ 27, TARGET_VAL(PPCISD::MTCTR),// ->66220
27802 /* 66201*/ OPC_MorphNodeTo1, TARGET_VAL(PPC::MTCTR), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutp…
27805 // Dst: (MTCTR:{ *:[i32] } i32:{ *:[i32] }:$rS)
/external/capstone/arch/PowerPC/
DPPCGenDisassemblerTables.inc993 /* 4038 */ MCD_OPC_Decode, 181, 5, 35, // Opcode: MTCTR
DPPCGenAsmWriter.inc713 283817U, // MTCTR
1986 0U, // MTCTR