Searched refs:MTK_WDT_BASE (Results 1 – 5 of 5) sorted by relevance
162 #define MTK_WDT_BASE (IO_PHYS + 0x00007000) macro164 #define MTK_WDT_MODE (MTK_WDT_BASE + 0x0000)165 #define MTK_WDT_LENGTH (MTK_WDT_BASE + 0x0004)166 #define MTK_WDT_RESTART (MTK_WDT_BASE + 0x0008)167 #define MTK_WDT_STATUS (MTK_WDT_BASE + 0x000C)168 #define MTK_WDT_INTERVAL (MTK_WDT_BASE + 0x0010)169 #define MTK_WDT_SWRST (MTK_WDT_BASE + 0x0014)170 #define MTK_WDT_SWSYSRST (MTK_WDT_BASE + 0x0018)171 #define MTK_WDT_NONRST_REG (MTK_WDT_BASE + 0x0020)172 #define MTK_WDT_NONRST_REG2 (MTK_WDT_BASE + 0x0024)[all …]
76 #define MTK_WDT_BASE (RGU_BASE) macro78 #define MTK_WDT_MODE (MTK_WDT_BASE+0x0000)79 #define MTK_WDT_LENGTH (MTK_WDT_BASE+0x0004)80 #define MTK_WDT_RESTART (MTK_WDT_BASE+0x0008)81 #define MTK_WDT_STATUS (MTK_WDT_BASE+0x000C)82 #define MTK_WDT_INTERVAL (MTK_WDT_BASE+0x0010)83 #define MTK_WDT_SWRST (MTK_WDT_BASE+0x0014)84 #define MTK_WDT_SWSYSRST (MTK_WDT_BASE+0x0018)85 #define MTK_WDT_NONRST_REG (MTK_WDT_BASE+0x0020)86 #define MTK_WDT_NONRST_REG2 (MTK_WDT_BASE+0x0024)[all …]
86 #define MTK_WDT_BASE (RGU_BASE + 0) macro87 #define MTK_WDT_SWRST (MTK_WDT_BASE + 0x0014)
440 mmio_clrbits_32(MTK_WDT_BASE, in plat_system_reset()442 mmio_setbits_32(MTK_WDT_BASE, (MTK_WDT_MODE_KEY | MTK_WDT_MODE_EXTEN)); in plat_system_reset()
458 mmio_clrsetbits_32(MTK_WDT_BASE, in plat_system_reset()461 mmio_setbits_32(MTK_WDT_BASE, (MTK_WDT_MODE_KEY | MTK_WDT_MODE_EXTEN)); in plat_system_reset()