Searched refs:MUL_F32 (Results 1 – 17 of 17) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | fpext.f16.ll | 157 ; SI: v_mul_f32_e32 [[MUL_F32:v[0-9]+]], [[CVTA_NEG]], [[CVTA]]
158 ; SI: v_cvt_f16_f32_e32 [[MUL:v[0-9]+]], [[MUL_F32]]
202 ; SI: v_mul_f32_e64 [[MUL_F32:v[0-9]+]], |[[CVTA]]|, [[CVTA]]
203 ; SI: v_cvt_f16_f32_e32 [[MUL:v[0-9]+]], [[MUL_F32]]
249 ; SI: v_mul_f32_e64 [[MUL_F32:v[0-9]+]], -|[[CVTA]]|, [[CVTA]]
250 ; SI: v_cvt_f16_f32_e32 [[MUL:v[0-9]+]], [[MUL_F32]]
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| /external/llvm/include/llvm/CodeGen/ |
| D | RuntimeLibcalls.h | 96 MUL_F32, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 81 { RTLIB::MUL_F32, "__mips16_mulsf3" },
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 81 { RTLIB::MUL_F32, "__mips16_mulsf3" },
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 98 HANDLE_LIBCALL(MUL_F32, "__mulsf3")
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 99 return Size == 64 ? RTLIB::MUL_F64 : RTLIB::MUL_F32; in getRTLibDesc()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 159 Table[RTLIB::MUL_F32] = f32_func_f32_f32; in RuntimeLibcallSignatureTable()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 414 RTLIB::MUL_F32, in SoftenFloatRes_FMUL()
1237 RTLIB::MUL_F32, in ExpandFloatRes_FMUL()
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| D | LegalizeDAG.cpp | 3921 Results.push_back(ExpandFPLibCall(Node, RTLIB::MUL_F32, RTLIB::MUL_F64, in ConvertNodeToLibcall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 417 RTLIB::MUL_F32, in SoftenFloatRes_FMUL()
1291 RTLIB::MUL_F32, in ExpandFloatRes_FMUL()
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| D | LegalizeDAG.cpp | 4207 Results.push_back(ExpandFPLibCall(Node, RTLIB::MUL_F32, RTLIB::MUL_F64, in ConvertNodeToLibcall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 213 { RTLIB::MUL_F32, "__mspabi_mpyf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1608 setLibcallName(RTLIB::MUL_F32, "__hexagon_fast_mulsf3"); in HexagonTargetLowering()
1617 setLibcallName(RTLIB::MUL_F32, "__hexagon_mulsf3"); in HexagonTargetLowering()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 114 Names[RTLIB::MUL_F32] = "__mulsf3"; in InitLibcallNames()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2106 setLibcallName(RTLIB::MUL_F32, "__hexagon_fast_mulsf3"); in HexagonTargetLowering()
2115 setLibcallName(RTLIB::MUL_F32, "__hexagon_mulsf3"); in HexagonTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 182 { RTLIB::MUL_F32, "__mulsf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering()
286 { RTLIB::MUL_F32, "__aeabi_fmul", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 253 { RTLIB::MUL_F32, "__mulsf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering()
350 { RTLIB::MUL_F32, "__aeabi_fmul", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
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