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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMParallelDSP.cpp53 using MemInstList = SmallVector<Instruction*, 8>; typedef
62 MemInstList VecLd; // List of all load instructions.
121 bool AreSequentialLoads(LoadInst *Ld0, LoadInst *Ld1, MemInstList &VecMem);
290 MemInstList &VecMem, const DataLayout &DL, in AreSequentialAccesses()
307 MemInstList &VecMem) { in AreSequentialLoads()