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/external/one-true-awk/testdir/
Dt.addops3 if (n != $1 + $1) print NR, "urk +="
6 if (n != 0) print NR, "urk -="
9 if (n != 3.5 * $1) print NR, "urk *="
12 if (n != $1 / 4) print NR, "urk /="
13 n = NR
15 if (n != NR * NR) print NR, "urk1 ^=", n, NR * NR
16 n = NR
18 if (n != NR * NR) print NR, "urk1 **=", n, NR * NR
19 n = NR
22 sq = sprintf("%.10g", NR * sqrt(NR))
[all …]
Dt.arith1 { print NR, $1, $1+$1, $1-$1, $1 * $1 }
2 { print NR, $1/NR, $1 % NR }
3 # { print NR, $1++, $1--, --$1, $1-- } # this depends on order of eval of args!
4 { print NR, -$1 }
5 $1 > 0 { print NR, $1 ^ 0.5 }
6 $1 > 0 { print NR, $1 ** 0.5 }
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
DIntervalMap.cpp40 NodeRef NR = path[l].subtree(path[l].offset - 1); in getLeftSibling() local
44 NR = NR.subtree(NR.size() - 1); in getLeftSibling()
45 return NR; in getLeftSibling()
65 NodeRef NR = subtree(l); in moveLeft() local
69 path[l] = Entry(NR, NR.size() - 1); in moveLeft()
70 NR = NR.subtree(NR.size() - 1); in moveLeft()
72 path[l] = Entry(NR, NR.size() - 1); in moveLeft()
90 NodeRef NR = path[l].subtree(path[l].offset + 1); in getRightSibling() local
94 NR = NR.subtree(0); in getRightSibling()
95 return NR; in getRightSibling()
[all …]
/external/llvm/lib/Support/
DIntervalMap.cpp40 NodeRef NR = path[l].subtree(path[l].offset - 1); in getLeftSibling() local
44 NR = NR.subtree(NR.size() - 1); in getLeftSibling()
45 return NR; in getLeftSibling()
65 NodeRef NR = subtree(l); in moveLeft() local
69 path[l] = Entry(NR, NR.size() - 1); in moveLeft()
70 NR = NR.subtree(NR.size() - 1); in moveLeft()
72 path[l] = Entry(NR, NR.size() - 1); in moveLeft()
90 NodeRef NR = path[l].subtree(path[l].offset + 1); in getRightSibling() local
94 NR = NR.subtree(0); in getRightSibling()
95 return NR; in getRightSibling()
[all …]
/external/XNNPACK/scripts/
Dgenerate-f32-igemm.sh9 tools/xngen src/f32-igemm/scalar.c.in -D MR=1 -D NR=4 -D WASM=0 -o src/f32-igemm/gen/1x4-scalar.c
10 tools/xngen src/f32-igemm/scalar.c.in -D MR=2 -D NR=4 -D WASM=0 -o src/f32-igemm/gen/2x4-scalar.c
11 tools/xngen src/f32-igemm/scalar.c.in -D MR=4 -D NR=2 -D WASM=0 -o src/f32-igemm/gen/4x2-scalar.c
12 tools/xngen src/f32-igemm/scalar.c.in -D MR=4 -D NR=4 -D WASM=0 -o src/f32-igemm/gen/4x4-scalar.c
15 tools/xngen src/f32-igemm/scalar.c.in -D MR=1 -D NR=4 -D WASM=1 -o src/f32-igemm/gen/1x4-wasm.c
16 tools/xngen src/f32-igemm/scalar.c.in -D MR=2 -D NR=4 -D WASM=1 -o src/f32-igemm/gen/2x4-wasm.c
17 tools/xngen src/f32-igemm/scalar.c.in -D MR=4 -D NR=2 -D WASM=1 -o src/f32-igemm/gen/4x2-wasm.c
18 tools/xngen src/f32-igemm/scalar.c.in -D MR=4 -D NR=4 -D WASM=1 -o src/f32-igemm/gen/4x4-wasm.c
37 tools/xngen src/f32-igemm/neon-ld64.c.in -D MR=1 -D NR=8 -D FMA=0 -D DUP=0 -o src/f32-igemm/ge…
38 tools/xngen src/f32-igemm/neon-ld64.c.in -D MR=1 -D NR=8 -D FMA=1 -D DUP=0 -o src/f32-igemm/ge…
[all …]
Dgenerate-f32-spmm.sh9 tools/xngen src/f32-spmm/scalar.c.in -D MR=1 -D NR=1 -D UNROLL=1 -o src/f32-spmm/gen/1x1-scalar.c
10 tools/xngen src/f32-spmm/scalar.c.in -D MR=2 -D NR=1 -D UNROLL=1 -o src/f32-spmm/gen/2x1-scalar.c
11 tools/xngen src/f32-spmm/scalar.c.in -D MR=4 -D NR=1 -D UNROLL=1 -o src/f32-spmm/gen/4x1-scalar.c
12 tools/xngen src/f32-spmm/scalar.c.in -D MR=8 -D NR=1 -D UNROLL=1 -o src/f32-spmm/gen/8x1-scalar.c
13 tools/xngen src/f32-spmm/scalar.c.in -D MR=8 -D NR=2 -D UNROLL=1 -o src/f32-spmm/gen/8x2-scalar.c
14 tools/xngen src/f32-spmm/scalar.c.in -D MR=8 -D NR=4 -D UNROLL=1 -o src/f32-spmm/gen/8x4-scalar.c
16 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=1 -D NR=1 -o src/f32-spmm/gen/1x1-scalar-pipel…
17 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=2 -D NR=1 -o src/f32-spmm/gen/2x1-scalar-pipel…
18 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=4 -D NR=1 -o src/f32-spmm/gen/4x1-scalar-pipel…
19 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=8 -D NR=1 -o src/f32-spmm/gen/8x1-scalar-pipel…
[all …]
Dgenerate-f32-gemm.sh9 tools/xngen src/f32-gemm/scalar.c.in -D MR=1 -D NR=4 -D WASM=0 -D INC=0 -o src/f32-gemm/gen/1x4-sca…
10 tools/xngen src/f32-gemm/scalar.c.in -D MR=1 -D NR=4 -D WASM=0 -D INC=1 -o src/f32-gemm/gen-inc/1x4…
12 tools/xngen src/f32-gemm/scalar.c.in -D MR=2 -D NR=4 -D WASM=0 -D INC=0 -o src/f32-gemm/gen/2x4-sca…
13 tools/xngen src/f32-gemm/scalar.c.in -D MR=2 -D NR=4 -D WASM=0 -D INC=1 -o src/f32-gemm/gen-inc/2x4…
15 tools/xngen src/f32-gemm/scalar.c.in -D MR=4 -D NR=2 -D WASM=0 -D INC=0 -o src/f32-gemm/gen/4x2-sca…
17 tools/xngen src/f32-gemm/scalar.c.in -D MR=4 -D NR=4 -D WASM=0 -D INC=0 -o src/f32-gemm/gen/4x4-sca…
18 tools/xngen src/f32-gemm/scalar.c.in -D MR=4 -D NR=4 -D WASM=0 -D INC=1 -o src/f32-gemm/gen-inc/4x4…
21 tools/xngen src/f32-gemm/scalar.c.in -D MR=1 -D NR=4 -D WASM=1 -D INC=0 -o src/f32-gemm/gen/1x4-was…
22 tools/xngen src/f32-gemm/scalar.c.in -D MR=1 -D NR=4 -D WASM=1 -D INC=1 -o src/f32-gemm/gen-inc/1x4…
24 tools/xngen src/f32-gemm/scalar.c.in -D MR=2 -D NR=4 -D WASM=1 -D INC=0 -o src/f32-gemm/gen/2x4-was…
[all …]
Dgenerate-f32-ppmm.sh8 tools/xngen src/f32-ppmm/scalar.c.in -D MR=4 -D NR=4 -o src/f32-ppmm/gen/4x4-scalar.c
9 tools/xngen src/f32-ppmm/scalar.c.in -D MR=2 -D NR=4 -o src/f32-ppmm/gen/2x4-scalar.c
10 tools/xngen src/f32-ppmm/scalar.c.in -D MR=4 -D NR=2 -o src/f32-ppmm/gen/4x2-scalar.c
11 tools/xngen src/f32-ppmm/scalar.c.in -D MR=3 -D NR=3 -o src/f32-ppmm/gen/3x3-scalar.c
14 tools/xngen src/f32-ppmm/neon.c.in -D MR=4 -D NR=8 -D FMA=0 -o src/f32-ppmm/gen/4x8-neon.c
15 tools/xngen src/f32-ppmm/neon.c.in -D MR=4 -D NR=8 -D FMA=1 -o src/f32-ppmm/gen/4x8-neonfma.c
16 tools/xngen src/f32-ppmm/neon.c.in -D MR=8 -D NR=8 -D FMA=0 -o src/f32-ppmm/gen/8x8-neon.c
17 tools/xngen src/f32-ppmm/neon.c.in -D MR=8 -D NR=8 -D FMA=1 -o src/f32-ppmm/gen/8x8-neonfma.c
20 tools/xngen src/f32-ppmm/psimd.c.in -D MR=4 -D NR=8 -o src/f32-ppmm/gen/4x8-psimd.c
23 tools/xngen src/f32-ppmm/sse.c.in -D MR=4 -D NR=8 -o src/f32-ppmm/gen/4x8-sse.c
/external/strace/tests/
Dmatch.awk31 NR > lines { next }
34 if (s[NR]) {
35 if ($0 == s[NR])
37 print "Line " NR " does not match expected string: " s[NR]
39 if (match($0, r[NR]))
41 print "Line " NR " does not match expected pattern: " r[NR]
48 if (fail == 0 && NR != lines) {
50 print "Expected " lines " lines, found " NR " line(s)."
/external/strace/tests-m32/
Dmatch.awk31 NR > lines { next }
34 if (s[NR]) {
35 if ($0 == s[NR])
37 print "Line " NR " does not match expected string: " s[NR]
39 if (match($0, r[NR]))
41 print "Line " NR " does not match expected pattern: " r[NR]
48 if (fail == 0 && NR != lines) {
50 print "Expected " lines " lines, found " NR " line(s)."
/external/strace/tests-mx32/
Dmatch.awk31 NR > lines { next }
34 if (s[NR]) {
35 if ($0 == s[NR])
37 print "Line " NR " does not match expected string: " s[NR]
39 if (match($0, r[NR]))
41 print "Line " NR " does not match expected pattern: " r[NR]
48 if (fail == 0 && NR != lines) {
50 print "Expected " lines " lines, found " NR " line(s)."
/external/XNNPACK/src/f32-gemm/
Dsse-dup.c.in6 $assert NR % 4 == 0
15 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}__sse_dup(
64 $for N in range(0, NR, 4):
65 __m128 vacc${M}x${ABC[N:N+4]} = _mm_load_ps(acc + ${M*NR+N});
66 acc += ${MR*NR};
68 $for N in range(0, NR, 4):
71 $for N in range(0, NR, 4):
73 w += ${NR};
87 $for N in range(0, NR, 4):
88 const __m128 vb${ABC[N:N+4]}c${L} = _mm_load_ps(w + ${L * NR + N});
[all …]
Dsse-shuffle.c.in6 $assert NR % 4 == 0
15 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}s4__sse(
64 $for N in range(0, NR, 4):
65 __m128 vacc${M}x${ABC[N:N+4]} = _mm_load_ps(acc + ${M*NR+N});
66 acc += ${MR*NR};
68 $for N in range(0, NR, 4):
71 $for N in range(0, NR, 4):
73 w += ${NR};
83 $for N in range(0, NR, 4):
84 const __m128 vb${ABC[N:N+4]}c${L} = _mm_load_ps(w + ${L * NR + N});
[all …]
Dpsimd-s4.c.in6 $assert NR % 4 == 0
15 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}s4__psimd(
64 $for N in range(0, NR, 4):
65 psimd_f32 vacc${M}x${ABC[N:N+4]} = psimd_load_f32(acc + ${M*NR+N});
66 acc += ${MR*NR};
68 $for N in range(0, NR, 4):
71 $for N in range(0, NR, 4):
73 w += ${NR};
83 $for N in range(0, NR, 4):
84 const psimd_f32 vb${ABC[N:N+4]}c${L} = psimd_load_f32(w + ${L * NR + N});
[all …]
Dpsimd-splat.c.in6 $assert NR % 4 == 0
15 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}__psimd_splat(
64 $for N in range(0, NR, 4):
65 psimd_f32 vacc${M}x${ABC[N:N+4]} = psimd_load_f32(acc + ${M*NR+N});
66 acc += ${MR*NR};
68 $for N in range(0, NR, 4):
71 $for N in range(0, NR, 4):
73 w += ${NR};
85 $for N in range(0, NR, 4):
86 const psimd_f32 vb${ABC[N:N+4]}c${L} = psimd_load_f32(w + ${L * NR + N});
[all …]
Dscalar.c.in14 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}__${"wasm" if WASM else "scalar"}(
63 $for N in range(NR):
64 float vacc${M}${N} = acc[${M*NR+N}];
65 acc += ${MR*NR};
67 $for N in range(NR):
69 w += ${NR};
71 $for N in range(NR):
79 $for N in range(NR):
81 w += ${NR};
84 $for N in range(NR):
[all …]
Dsse-load1.c.in6 $assert NR % 4 == 0
15 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}__sse_load1(
64 $for N in range(0, NR, 4):
65 __m128 vacc${M}x${ABC[N:N+4]} = _mm_load_ps(acc + ${M*NR+N});
66 acc += ${MR*NR};
68 $for N in range(0, NR, 4):
71 $for N in range(0, NR, 4):
73 w += ${NR};
82 $for N in range(4, NR, 4):
84 w += ${NR};
[all …]
Davx512-broadcast.c.in6 $assert NR % 16 == 0
16 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}__avx512f_broadcast(
65 $for N in range(0, NR, 16):
66 __m512 vacc${M}x${ABC[N:N+16]} = _mm512_load_ps(acc + ${M*NR+N});
67 acc += ${MR*NR};
70 $for N in range(16, NR, 16):
73 $for N in range(0, NR, 16):
75 w += ${NR};
80 $for N in range(16, NR, 16):
82 w += ${NR};
[all …]
Dpsimd-loadsplat.c.in6 $assert NR % 4 == 0
15 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}__psimd_loadsplat(
64 $for N in range(0, NR, 4):
65 psimd_f32 vacc${M}x${ABC[N:N+4]} = psimd_load_f32(acc + ${M*NR+N});
66 acc += ${MR*NR};
68 $for N in range(0, NR, 4):
71 $for N in range(0, NR, 4):
73 w += ${NR};
82 $for N in range(4, NR, 4):
84 w += ${NR};
[all …]
Davx-shuffle4.c.in6 $assert NR % 8 == 0
16 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}s4__${ISA}_broadcast(
65 $for N in range(0, NR, 8):
66 __m256 vacc${M}x${ABC[N:N+8]} = _mm256_load_ps(acc + ${M*NR+N});
67 acc += ${MR*NR};
69 $for N in range(0, NR, 8):
72 $for N in range(0, NR, 8):
74 w += ${NR};
84 $for N in range(0, NR, 8):
85 const __m256 vb${ABC[N:N+8]}c${L} = _mm256_load_ps(w + ${L * NR + N});
[all …]
Dneon-shuffle.c.in6 $assert NR % 4 == 0
17 void xnn_f32_gemm${"inc" if INC else ""}_ukernel_${MR}x${NR}s4__${"neonfma" if FMA else "neon"}(
66 $for N in range(0, NR, 4):
69 $for N in range(0, NR, 4):
72 $for N in range(0, NR, 4):
82 $for N in range(0, NR, 4):
83 const float32x4_t vb${ABC[N:N+4]}c${L} = vld1q_f32(w + ${L * NR + N});
85 $for N in range(0, NR, 4):
93 w += ${4 * NR};
101 $for N in range(0, NR, 4):
[all …]
/external/XNNPACK/src/f32-ppmm/
Dscalar.c.in12 void xnn_f32_ppmm_ukernel_${MR}x${NR}__scalar(
46 $for N in range(NR):
49 $for N in range(NR):
51 w += ${NR};
59 $for N in range(NR):
61 w += ${NR};
63 $for N in range(NR):
71 $for N in range(NR):
76 $for N in range(NR):
80 if XNN_LIKELY(nc >= ${NR}) {
[all …]
/external/XNNPACK/src/f32-igemm/
Dsse-shuffle.c.in6 $assert NR % 4 == 0
15 void xnn_f32_igemm_ukernel_${MR}x${NR}s4__sse(
59 $for N in range(4, NR, 4):
62 $for N in range(0, NR, 4):
64 w += ${NR};
84 $for N in range(0, NR, 4):
85 const __m128 vb${ABC[N:N+4]}c${L} = _mm_load_ps(w + ${L * NR + N});
87 $for N in range(0, NR, 4):
95 w += ${4 * NR};
101 $for N in range(4, NR, 4):
[all …]
Dpsimd-splat.c.in6 $assert NR % 4 == 0
15 void xnn_f32_igemm_ukernel_${MR}x${NR}__psimd_splat(
59 $for N in range(4, NR, 4):
62 $for N in range(0, NR, 4):
64 w += ${NR};
86 $for N in range(0, NR, 4):
87 const psimd_f32 vb${ABC[N:N+4]}c${L} = psimd_load_f32(w + ${L * NR + N});
89 $for N in range(0, NR, 4):
93 w += ${4 * NR};
99 $for N in range(4, NR, 4):
[all …]
/external/XNNPACK/src/f32-spmm/
Dneon-blocked.c.in7 $assert NR in [1, 2, 4]
16 void xnn_f32_spmm_ukernel_${MR}x${NR}__${"neonfma" if FMA else "neon"}(
36 while (j >= ${NR}) {
38 $for N in range(0, NR, 1):
51 $if NR == 1:
53 $elif NR == 2:
55 $elif NR == 4:
58 $if NR == 1:
62 $for N in range(NR):
64 …vacc${ABC[M:M+4]}c${N} = vfmaq_lane${"q" if NR == 4 else ""}_f32(vacc${ABC[M:M+4]}c${N}, va${ABC[M…
[all …]

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