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Searched refs:Neon8 (Results 1 – 6 of 6) sorted by relevance

/external/v8/src/compiler/backend/arm/
Dcode-generator-arm.cc1694 __ vld1(Neon8, NeonListOperand(i.OutputDoubleRegister()), in AssembleArchInstruction()
1699 __ vst1(Neon8, NeonListOperand(i.InputDoubleRegister(0)), in AssembleArchInstruction()
1704 __ vld1(Neon8, NeonListOperand(i.OutputSimd128Register()), in AssembleArchInstruction()
1709 __ vst1(Neon8, NeonListOperand(i.InputSimd128Register(0)), in AssembleArchInstruction()
1843 __ vld1(Neon8, NeonListOperand(i.OutputSimd128Register()), in AssembleArchInstruction()
2670 __ vdup(Neon8, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction()
2689 __ vneg(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction()
2693 ASSEMBLE_SIMD_SHIFT_LEFT(vshl, 3, Neon8, NeonS8); in AssembleArchInstruction()
2697 ASSEMBLE_SIMD_SHIFT_RIGHT(vshr, 3, Neon8, NeonS8); in AssembleArchInstruction()
2704 __ vadd(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
[all …]
Dinstruction-selector-arm.cc2912 g.UseImmediate(Neon8), g.UseImmediate(index % 16)); in VisitI8x16Shuffle()
/external/v8/src/execution/arm/
Dsimulator-arm.cc3372 size = Neon8; in DecodeTypeVFP()
3378 case Neon8: { in DecodeTypeVFP()
4338 DCHECK_EQ(Neon8, size); in DecodeAdvancedSIMDTwoOrThreeRegisters()
4358 case Neon8: { in DecodeAdvancedSIMDTwoOrThreeRegisters()
4394 case Neon8: { in DecodeAdvancedSIMDTwoOrThreeRegisters()
4457 case Neon8: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4486 case Neon8: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4506 case Neon8: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4524 case Neon8: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4546 case Neon8: in DecodeAdvancedSIMDTwoOrThreeRegisters()
[all …]
/external/v8/src/wasm/baseline/arm/
Dliftoff-assembler-arm.h299 assm->vst1(Neon8, NeonListOperand(src.low_fp(), 2), NeonMemOperand(addr)); in Store()
332 assm->vld1(Neon8, NeonListOperand(dst.low_fp(), 2), NeonMemOperand(addr)); in Load()
586 __ vld1(Neon8, NeonListOperand(dst.low_fp(), 2),
725 vst1(Neon8, NeonListOperand(src.low_fp(), 2), in Store()
2238 vld1(Neon8, NeonListOperand(dst.low_fp()), in LoadTransform()
2242 vld1(Neon8, NeonListOperand(dst.low_fp()), in LoadTransform()
2277 vld1r(Neon8, NeonListOperand(liftoff::GetSimd128Register(dst)), in LoadTransform()
3192 vdup(Neon8, liftoff::GetSimd128Register(dst), src.gp()); in emit_i8x16_splat()
3218 vneg(Neon8, liftoff::GetSimd128Register(dst), in emit_i8x16_neg()
3260 vzip(Neon8, mask, tmp); in emit_i8x16_bitmask()
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/external/v8/src/codegen/arm/
Dconstants-arm.h296 enum NeonSize { Neon8 = 0x0, Neon16 = 0x1, Neon32 = 0x2, Neon64 = 0x3 }; enumerator
Dassembler-arm.cc3845 case Neon8: in vdup()
3976 DCHECK_EQ(Neon8, size); // size == 0 for vmvn in EncodeNeonUnaryOp()
3980 DCHECK_EQ(Neon8, size); // size == 0 for vswp in EncodeNeonUnaryOp()
4025 emit(EncodeNeonUnaryOp(VMVN, NEON_Q, Neon8, dst.code(), src.code())); in vmvn()
4033 emit(EncodeNeonUnaryOp(VSWP, NEON_D, Neon8, dst.code(), src.code())); in vswp()
4040 emit(EncodeNeonUnaryOp(VSWP, NEON_Q, Neon8, dst.code(), src.code())); in vswp()