/external/vixl/test/aarch32/ |
D | test-simulator-cond-rd-rn-rm-a32.cc | 220 {{NFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 221 {ZFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 222 {CFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 223 {VFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 224 {NZFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 225 {NCFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 226 {NVFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 227 {ZCFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 228 {ZVFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 229 {CVFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, [all …]
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D | test-simulator-cond-rd-rn-rm-t32.cc | 219 {{NFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 220 {ZFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 221 {CFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 222 {VFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 223 {NZFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 224 {NCFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 225 {NVFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 226 {ZCFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 227 {ZVFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, 228 {CVFlag, NoFlag, NoFlag, 0xabababab, 0xabababab, 0xabababab}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 200 {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002, 0}, 201 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff, 0}, 202 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0, 0}, 203 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002, 0}, 204 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd, 0}, 205 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff, 0}, 206 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83, 0}, 207 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001, 0}, 208 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003, 0}, 209 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff, 0}, [all …]
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D | test-simulator-cond-rd-operand-rn-shift-rs-t32.cc | 179 {{NoFlag, 0x00000000, 0x00000000, 0}, {NoFlag, 0x00000001, 0x00000001, 0}, 180 {NoFlag, 0x00000002, 0x00000002, 0}, {NoFlag, 0x00000020, 0x00000020, 0}, 181 {NoFlag, 0x0000007d, 0x0000007d, 0}, {NoFlag, 0x0000007e, 0x0000007e, 0}, 182 {NoFlag, 0x0000007f, 0x0000007f, 0}, {NoFlag, 0x00007ffd, 0x00007ffd, 0}, 183 {NoFlag, 0x00007ffe, 0x00007ffe, 0}, {NoFlag, 0x00007fff, 0x00007fff, 0}, 184 {NoFlag, 0x33333333, 0x33333333, 0}, {NoFlag, 0x55555555, 0x55555555, 0}, 185 {NoFlag, 0x7ffffffd, 0x7ffffffd, 0}, {NoFlag, 0x7ffffffe, 0x7ffffffe, 0}, 186 {NoFlag, 0x7fffffff, 0x7fffffff, 0}, {NoFlag, 0x80000000, 0x80000000, 0}, 187 {NoFlag, 0x80000001, 0x80000001, 0}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0}, 188 {NoFlag, 0xcccccccc, 0xcccccccc, 0}, {NoFlag, 0xffff8000, 0xffff8000, 0}, [all …]
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D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 185 {{NoFlag, 0x00000000, 0x00000000, 0}, {NoFlag, 0x00000001, 0x00000001, 0}, 186 {NoFlag, 0x00000002, 0x00000002, 0}, {NoFlag, 0x00000020, 0x00000020, 0}, 187 {NoFlag, 0x0000007d, 0x0000007d, 0}, {NoFlag, 0x0000007e, 0x0000007e, 0}, 188 {NoFlag, 0x0000007f, 0x0000007f, 0}, {NoFlag, 0x00007ffd, 0x00007ffd, 0}, 189 {NoFlag, 0x00007ffe, 0x00007ffe, 0}, {NoFlag, 0x00007fff, 0x00007fff, 0}, 190 {NoFlag, 0x33333333, 0x33333333, 0}, {NoFlag, 0x55555555, 0x55555555, 0}, 191 {NoFlag, 0x7ffffffd, 0x7ffffffd, 0}, {NoFlag, 0x7ffffffe, 0x7ffffffe, 0}, 192 {NoFlag, 0x7fffffff, 0x7fffffff, 0}, {NoFlag, 0x80000000, 0x80000000, 0}, 193 {NoFlag, 0x80000001, 0x80000001, 0}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0}, 194 {NoFlag, 0xcccccccc, 0xcccccccc, 0}, {NoFlag, 0xffff8000, 0xffff8000, 0}, [all …]
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D | test-simulator-cond-rd-rn-a32.cc | 181 {{NoFlag, 0x00000000, 0x00000000}, {NoFlag, 0x00000001, 0x00000001}, 182 {NoFlag, 0x00000002, 0x00000002}, {NoFlag, 0x00000020, 0x00000020}, 183 {NoFlag, 0x0000007d, 0x0000007d}, {NoFlag, 0x0000007e, 0x0000007e}, 184 {NoFlag, 0x0000007f, 0x0000007f}, {NoFlag, 0x00007ffd, 0x00007ffd}, 185 {NoFlag, 0x00007ffe, 0x00007ffe}, {NoFlag, 0x00007fff, 0x00007fff}, 186 {NoFlag, 0x33333333, 0x33333333}, {NoFlag, 0x55555555, 0x55555555}, 187 {NoFlag, 0x7ffffffd, 0x7ffffffd}, {NoFlag, 0x7ffffffe, 0x7ffffffe}, 188 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000}, 189 {NoFlag, 0x80000001, 0x80000001}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 190 {NoFlag, 0xcccccccc, 0xcccccccc}, {NoFlag, 0xffff8000, 0xffff8000}, [all …]
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D | test-simulator-cond-rd-rn-t32.cc | 181 {{NoFlag, 0x00000000, 0x00000000}, {NoFlag, 0x00000001, 0x00000001}, 182 {NoFlag, 0x00000002, 0x00000002}, {NoFlag, 0x00000020, 0x00000020}, 183 {NoFlag, 0x0000007d, 0x0000007d}, {NoFlag, 0x0000007e, 0x0000007e}, 184 {NoFlag, 0x0000007f, 0x0000007f}, {NoFlag, 0x00007ffd, 0x00007ffd}, 185 {NoFlag, 0x00007ffe, 0x00007ffe}, {NoFlag, 0x00007fff, 0x00007fff}, 186 {NoFlag, 0x33333333, 0x33333333}, {NoFlag, 0x55555555, 0x55555555}, 187 {NoFlag, 0x7ffffffd, 0x7ffffffd}, {NoFlag, 0x7ffffffe, 0x7ffffffe}, 188 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000}, 189 {NoFlag, 0x80000001, 0x80000001}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 190 {NoFlag, 0xcccccccc, 0xcccccccc}, {NoFlag, 0xffff8000, 0xffff8000}, [all …]
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D | test-simulator-cond-rd-rn-operand-const-t32.cc | 179 {{NoFlag, 0x00000000, 0x00000000}, {NoFlag, 0x00000001, 0x00000001}, 180 {NoFlag, 0x00000002, 0x00000002}, {NoFlag, 0x00000020, 0x00000020}, 181 {NoFlag, 0x0000007d, 0x0000007d}, {NoFlag, 0x0000007e, 0x0000007e}, 182 {NoFlag, 0x0000007f, 0x0000007f}, {NoFlag, 0x00007ffd, 0x00007ffd}, 183 {NoFlag, 0x00007ffe, 0x00007ffe}, {NoFlag, 0x00007fff, 0x00007fff}, 184 {NoFlag, 0x33333333, 0x33333333}, {NoFlag, 0x55555555, 0x55555555}, 185 {NoFlag, 0x7ffffffd, 0x7ffffffd}, {NoFlag, 0x7ffffffe, 0x7ffffffe}, 186 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000}, 187 {NoFlag, 0x80000001, 0x80000001}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 188 {NoFlag, 0xcccccccc, 0xcccccccc}, {NoFlag, 0xffff8000, 0xffff8000}, [all …]
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D | test-simulator-cond-rd-rn-operand-const-a32.cc | 195 {{NoFlag, 0x00000000, 0x00000000}, {NoFlag, 0x00000001, 0x00000001}, 196 {NoFlag, 0x00000002, 0x00000002}, {NoFlag, 0x00000020, 0x00000020}, 197 {NoFlag, 0x0000007d, 0x0000007d}, {NoFlag, 0x0000007e, 0x0000007e}, 198 {NoFlag, 0x0000007f, 0x0000007f}, {NoFlag, 0x00007ffd, 0x00007ffd}, 199 {NoFlag, 0x00007ffe, 0x00007ffe}, {NoFlag, 0x00007fff, 0x00007fff}, 200 {NoFlag, 0x33333333, 0x33333333}, {NoFlag, 0x55555555, 0x55555555}, 201 {NoFlag, 0x7ffffffd, 0x7ffffffd}, {NoFlag, 0x7ffffffe, 0x7ffffffe}, 202 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000}, 203 {NoFlag, 0x80000001, 0x80000001}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 204 {NoFlag, 0xcccccccc, 0xcccccccc}, {NoFlag, 0xffff8000, 0xffff8000}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 210 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 211 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 212 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 213 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 214 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 215 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 216 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 217 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 218 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 219 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc | 184 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 185 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 186 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 187 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 188 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 189 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 190 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 191 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 192 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 193 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc | 184 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 185 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 186 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 187 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 188 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 189 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 190 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 191 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 192 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 193 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 179 {{NoFlag, 0x7ffffffe, 0xffffff81, 0x7ffffffe}, 180 {NoFlag, 0xfffffffd, 0x00000000, 0xfffffffd}, 181 {NoFlag, 0xfffffffe, 0x33333333, 0xfffffffe}, 182 {NoFlag, 0x0000007e, 0x7fffffff, 0x0000007e}, 183 {NoFlag, 0xffffffff, 0x7fffffff, 0xffffffff}, 184 {NoFlag, 0x00000020, 0x7ffffffe, 0x00000020}, 185 {NoFlag, 0x00000020, 0xffffff83, 0x00000020}, 186 {NoFlag, 0x0000007e, 0xffffff80, 0x0000007e}, 187 {NoFlag, 0x0000007f, 0xffff8003, 0x0000007f}, 188 {NoFlag, 0xffffffe0, 0xffff8000, 0xffffffe0}, [all …]
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D | test-simulator-cond-rd-rn-rm-q-t32.cc | 166 {{NoFlag, QFlag, NoFlag, 0xabababab, 0xffffff80, 0x0000007f}, 167 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000001, 0xffff8001}, 168 {NoFlag, QFlag, NoFlag, 0xabababab, 0x0000007f, 0x00007fff}, 169 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffff8001, 0x80000000}, 170 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffffff81, 0x00000002}, 171 {NoFlag, NoFlag, NoFlag, 0xabababab, 0x0000007f, 0x00000002}, 172 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000000, 0x00000002}, 173 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffff8003, 0x7fffffff}, 174 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000002, 0x0000007d}, 175 {NoFlag, QFlag, NoFlag, 0xabababab, 0x80000000, 0x55555555}, [all …]
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D | test-simulator-cond-rd-rn-rm-q-a32.cc | 166 {{NoFlag, QFlag, NoFlag, 0xabababab, 0xffffff80, 0x0000007f}, 167 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000001, 0xffff8001}, 168 {NoFlag, QFlag, NoFlag, 0xabababab, 0x0000007f, 0x00007fff}, 169 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffff8001, 0x80000000}, 170 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffffff81, 0x00000002}, 171 {NoFlag, NoFlag, NoFlag, 0xabababab, 0x0000007f, 0x00000002}, 172 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000000, 0x00000002}, 173 {NoFlag, QFlag, NoFlag, 0xabababab, 0xffff8003, 0x7fffffff}, 174 {NoFlag, QFlag, NoFlag, 0xabababab, 0x00000002, 0x0000007d}, 175 {NoFlag, QFlag, NoFlag, 0xabababab, 0x80000000, 0x55555555}, [all …]
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D | test-simulator-cond-rd-rn-rm-ge-a32.cc | 174 {{NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00007ffe, 0x00007fff}, 175 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00000001, 0xffffff83}, 176 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0xffffff80, 0x00007ffd}, 177 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffff8002, 0xffffffe0}, 178 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffffffff, 0xffff8003}, 179 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0xffff8002, 0x0000007f}, 180 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffff8001, 0x33333333}, 181 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x0000007f, 0x00007fff}, 182 {NoFlag, NoFlag, NoFlag, 0xabababab, 0x33333333, 0x0000007d}, 183 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x80000001, 0xffffff80}, [all …]
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D | test-simulator-cond-rd-rn-rm-ge-t32.cc | 174 {{NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00007ffe, 0x00007fff}, 175 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x00000001, 0xffffff83}, 176 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0xffffff80, 0x00007ffd}, 177 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffff8002, 0xffffffe0}, 178 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffffffff, 0xffff8003}, 179 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0xffff8002, 0x0000007f}, 180 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffff8001, 0x33333333}, 181 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x0000007f, 0x00007fff}, 182 {NoFlag, NoFlag, NoFlag, 0xabababab, 0x33333333, 0x0000007d}, 183 {NoFlag, NoFlag, GE0123Flag, 0xabababab, 0x80000001, 0xffffff80}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 198 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 200 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 202 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 203 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 204 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 205 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 206 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 207 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 198 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 200 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 202 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 203 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 204 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 205 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 206 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 207 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rd-rn-rm-sel-a32.cc | 162 {{NoFlag, NoFlag, GE123Flag, 0xabababab, 0xfffffffe, 0x0000007e}, 163 {NoFlag, NoFlag, GE23Flag, 0xabababab, 0x7fffffff, 0xffffff82}, 164 {NoFlag, NoFlag, GE123Flag, 0xabababab, 0x7ffffffe, 0xffffff81}, 165 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0x7fffffff, 0x0000007d}, 166 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffffffe0, 0xffff8003}, 167 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0x00007ffe, 0xffffff83}, 168 {NoFlag, NoFlag, GE03Flag, 0xabababab, 0xaaaaaaaa, 0xfffffffd}, 169 {NoFlag, NoFlag, GE012Flag, 0xabababab, 0x80000000, 0x80000001}, 170 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0xffffff80, 0x7fffffff}, 171 {NoFlag, NoFlag, GE03Flag, 0xabababab, 0xffff8000, 0xfffffffd}, [all …]
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D | test-simulator-cond-rd-rn-rm-sel-t32.cc | 162 {{NoFlag, NoFlag, GE123Flag, 0xabababab, 0xfffffffe, 0x0000007e}, 163 {NoFlag, NoFlag, GE23Flag, 0xabababab, 0x7fffffff, 0xffffff82}, 164 {NoFlag, NoFlag, GE123Flag, 0xabababab, 0x7ffffffe, 0xffffff81}, 165 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0x7fffffff, 0x0000007d}, 166 {NoFlag, NoFlag, NoFlag, 0xabababab, 0xffffffe0, 0xffff8003}, 167 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0x00007ffe, 0xffffff83}, 168 {NoFlag, NoFlag, GE03Flag, 0xabababab, 0xaaaaaaaa, 0xfffffffd}, 169 {NoFlag, NoFlag, GE012Flag, 0xabababab, 0x80000000, 0x80000001}, 170 {NoFlag, NoFlag, GE13Flag, 0xabababab, 0xffffff80, 0x7fffffff}, 171 {NoFlag, NoFlag, GE03Flag, 0xabababab, 0xffff8000, 0xfffffffd}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 198 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 200 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 202 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 203 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 204 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 205 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 206 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 207 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 198 static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002}, 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff}, 200 {NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0}, 201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002}, 202 {NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd}, 203 {NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff}, 204 {NoFlag, 0xffff8000, 0xffff8000, 0xffffff83}, 205 {NoFlag, 0xffff8002, 0xffff8002, 0x80000001}, 206 {NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003}, 207 {NoFlag, 0x00007fff, 0x00007fff, 0xffffffff}, [all …]
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D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 182 {{NoFlag, 0x00000000, 0x00000000}, {NoFlag, 0x00000001, 0x00000001}, 183 {NoFlag, 0x00000002, 0x00000002}, {NoFlag, 0x00000020, 0x00000020}, 184 {NoFlag, 0x0000007d, 0x0000007d}, {NoFlag, 0x0000007e, 0x0000007e}, 185 {NoFlag, 0x0000007f, 0x0000007f}, {NoFlag, 0x00007ffd, 0x00007ffd}, 186 {NoFlag, 0x00007ffe, 0x00007ffe}, {NoFlag, 0x00007fff, 0x00007fff}, 187 {NoFlag, 0x33333333, 0x33333333}, {NoFlag, 0x55555555, 0x55555555}, 188 {NoFlag, 0x7ffffffd, 0x7ffffffd}, {NoFlag, 0x7ffffffe, 0x7ffffffe}, 189 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000}, 190 {NoFlag, 0x80000001, 0x80000001}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 191 {NoFlag, 0xcccccccc, 0xcccccccc}, {NoFlag, 0xffff8000, 0xffff8000}, [all …]
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D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 182 {{NoFlag, 0x00000000, 0x00000000}, {NoFlag, 0x00000001, 0x00000001}, 183 {NoFlag, 0x00000002, 0x00000002}, {NoFlag, 0x00000020, 0x00000020}, 184 {NoFlag, 0x0000007d, 0x0000007d}, {NoFlag, 0x0000007e, 0x0000007e}, 185 {NoFlag, 0x0000007f, 0x0000007f}, {NoFlag, 0x00007ffd, 0x00007ffd}, 186 {NoFlag, 0x00007ffe, 0x00007ffe}, {NoFlag, 0x00007fff, 0x00007fff}, 187 {NoFlag, 0x33333333, 0x33333333}, {NoFlag, 0x55555555, 0x55555555}, 188 {NoFlag, 0x7ffffffd, 0x7ffffffd}, {NoFlag, 0x7ffffffe, 0x7ffffffe}, 189 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000}, 190 {NoFlag, 0x80000001, 0x80000001}, {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 191 {NoFlag, 0xcccccccc, 0xcccccccc}, {NoFlag, 0xffff8000, 0xffff8000}, [all …]
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