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Searched refs:OPC (Results 1 – 25 of 27) sorted by relevance

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/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_disasm.c458 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} macro
462 OPC(NOP),
463 OPC(ADD),
464 OPC(MAD),
465 OPC(MUL),
466 OPC(DST),
467 OPC(DP3),
468 OPC(DP4),
469 OPC(DSX),
470 OPC(DSY),
[all …]
Detnaviv_compiler_nir_emit.c58 #define OPC(nir, op, src, cond) OPCT(nir, op, src, cond, F32) macro
61 #define OP(nir, op, src) OPC(nir, op, src, TRUE)
67 OPC(fmin, SELECT, 0_1_0, GT), OPC(fmax, SELECT, 0_1_0, LT),
72 …OPC(seq, SET, 0_1_X, EQ), OPC(sne, SET, 0_1_X, NE), OPC(sge, SET, 0_1_X, GE), OPC(slt, SET, 0_1_X,…
73 OPC(fcsel, SELECT, 0_1_2, NZ),
84 OPC(f2b32, CMP, 0_X_X, NE), /* != 0.0 */
103 OPC(feq32, CMP, 0_1_X, EQ),
104 OPC(fneu32, CMP, 0_1_X, NE),
105 OPC(fge32, CMP, 0_1_X, GE),
106 OPC(flt32, CMP, 0_1_X, LT),
/external/mesa3d/src/freedreno/ir3/
Ddisasm-a3xx.c1306 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat } macro
1308 OPC(0, OPC_NOP, nop),
1309 OPC(0, OPC_B, b),
1310 OPC(0, OPC_JUMP, jump),
1311 OPC(0, OPC_CALL, call),
1312 OPC(0, OPC_RET, ret),
1313 OPC(0, OPC_KILL, kill),
1314 OPC(0, OPC_END, end),
1315 OPC(0, OPC_EMIT, emit),
1316 OPC(0, OPC_CUT, cut),
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/external/swiftshader/third_party/llvm-subzero/include/llvm/IR/
DInstruction.h518 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N, argument
525 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N, argument
532 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N, argument
539 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N, argument
546 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N, argument
553 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N, argument
/external/llvm/include/llvm/IR/
DInstruction.h476 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N,
483 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N,
490 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N,
497 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N,
504 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N,
511 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N,
DInstrTypes.h370 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
371 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
373 return Create(Instruction::OPC, V1, V2, Name);\
376 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
377 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
379 return Create(Instruction::OPC, V1, V2, Name, BB);\
382 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
383 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
385 return Create(Instruction::OPC, V1, V2, Name, I);\
455 #define DEFINE_HELPERS(OPC, NUWNSWEXACT) \
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/external/llvm/include/llvm/Target/
DTargetOpcodes.h23 #define HANDLE_TARGET_OPCODE(OPC, NUM) OPC = NUM, argument
24 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC, argument
DTargetOpcodes.def19 #define HANDLE_TARGET_OPCODE(OPC, NUM)
25 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetOpcodes.h23 #define HANDLE_TARGET_OPCODE(OPC) OPC, argument
24 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC, argument
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DInstruction.h625 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N,
632 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N,
639 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N,
646 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N,
653 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N,
660 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N,
DInstrTypes.h367 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
368 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
370 return Create(Instruction::OPC, V1, V2, Name);\
373 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
374 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
376 return Create(Instruction::OPC, V1, V2, Name, BB);\
379 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
380 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
382 return Create(Instruction::OPC, V1, V2, Name, I);\
483 #define DEFINE_HELPERS(OPC, NUWNSWEXACT) \
[all …]
/external/libpcap/
Dgrammar.h157 OPC = 367, enumerator
279 #define OPC 367 macro
Dgrammar.y342 %token SIO OPC DPC SLS HSIO HOPC HDPC HSLS
754 | OPC { $$.mtp3fieldtype = M_OPC; }
Dscanner.l384 opc return OPC;
Dgrammar.c475 OPC = 367, enumerator
597 #define OPC 367 macro
Dscanner.c3841 return OPC;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/
DValue.cpp113 #define HANDLE_INST(N, OPC, CLASS) \ in deleteValue() argument
114 case Value::InstructionVal + Instruction::OPC: \ in deleteValue()
117 #define HANDLE_USER_INST(N, OPC, CLASS) in deleteValue() argument
DInstructions.cpp80 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in getNumSuccessors() argument
81 case Instruction::OPC: \ in getNumSuccessors()
92 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in getSuccessor() argument
93 case Instruction::OPC: \ in getSuccessor()
104 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in setSuccessor() argument
105 case Instruction::OPC: \ in setSuccessor()
/external/llvm/utils/TableGen/
DCodeGenTarget.cpp304 #define HANDLE_TARGET_OPCODE(OPC, NUM) #OPC, in ComputeInstrsByEnum() argument
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DCodeGenTarget.cpp353 #define HANDLE_TARGET_OPCODE(OPC) #OPC, argument
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DTargetOpcodes.def19 #define HANDLE_TARGET_OPCODE(OPC, NUM)
25 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
/external/llvm/lib/Target/PowerPC/
DREADME.txt644 OP_type is the operand type - one of OPC (opcode), RD (register destination),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DREADME.txt644 OP_type is the operand type - one of OPC (opcode), RD (register destination),
/external/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td9334 // SWP SZ |111000|A |R |1 |Rs |1 |OPC|00|Rn |Rt
9335 // LD SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |Rt
9336 // ST SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |11111
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td10139 // SWP SZ |111000|A |R |1 |Rs |1 |OPC|00|Rn |Rt
10140 // LD SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |Rt
10141 // ST SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |11111

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