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Searched refs:Op1Def (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCBranchCoalescing.cpp365 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg()); in identicalOperands() local
367 if (TII->produceSameValue(*Op1Def, *Op2Def, MRI)) { in identicalOperands()
368 LLVM_DEBUG(dbgs() << "Op1Def: " << *Op1Def << " and " << *Op2Def in identicalOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIPeepholeSDWA.cpp729 MachineOperand *Op1Def = findSingleRegDef(Op1, MRI); in matchSDWAOperand() local
730 if (!Op1Def) in matchSDWAOperand()
733 MachineInstr *Op1Inst = Op1Def->getParent(); in matchSDWAOperand()
741 return CheckRetType(std::make_pair(Op1Def, Op2Def)); in matchSDWAOperand()
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringX86BaseImpl.h6081 auto *Op1Def = VMetadata->getFirstDefinitionSingleBlock(Var1);
6082 if (Op1Def != nullptr && !VMetadata->isMultiBlock(Var1) &&
6083 llvm::isa<InstLoad>(Op1Def)) {