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Searched refs:PL7 (Results 1 – 20 of 20) sorted by relevance

/external/u-boot/configs/
DSunchip_CX-A99_defconfig12 CONFIG_USB1_VBUS_PIN="PL7"
Dteres_i_defconfig8 CONFIG_USB1_VBUS_PIN="PL7"
/external/u-boot/arch/arm/dts/
Dsun8i-h3-orangepi-2.dts115 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
201 pins = "PL7";
Dsun8i-h2-plus-bananapi-m2-zero.dts54 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
Dsun50i-h6-orangepi.dtsi36 gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
Dsun8i-h3-nanopi-neo-air.dts78 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
Dsun8i-q8-common.dtsi91 pins = "PL6", "PL7", "PL11";
Dsun8i-h3-orangepi-zero-plus2.dts120 interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
Dsun8i-h3-nanopi-m1-plus.dts68 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
Dsun50i-h5-orangepi-zero-plus2.dts120 interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
Dsun50i-h6-pine-h64.dts51 gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
Dsun8i-h3-beelink-x2.dts92 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
Dsun50i-a64-teres-i.dts65 gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
Dsun50i-h5-nanopi-neo-plus2.dts116 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
Dsunxi-bananapi-m2-plus.dtsi105 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
Dsun9i-a80-cx-a99.dts103 gpio = <&r_pio 0 7 /* no flag support */ 0>; /* PL7 */
/external/python/cpython2/Lib/plat-unixware7/
DIN.py411 PL7 = PLHI variable
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart2.csv13849 "+","IT","PL7","Pila","Pila","PG","--3-----","RL","1301",,"4303N 01219E",
D2013-1_UNLOCODE_CodeListPart3.csv22300 ,"US","PL7","Pleasant Hill","Pleasant Hill","OR","--3-----","RQ","1001",,"4357N 12255W",
D2013-1_UNLOCODE_CodeListPart1.csv39867 ,"FR","PL7","Plougonven","Plougonven","29","--3--6--","RQ","0907",,"4831N 00343W",