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Searched refs:PLLP_OUT2_OVR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-tegra/
Dclk_rst.h264 #define PLLP_OUT2_OVR (1 << 18) macro
/external/u-boot/arch/arm/mach-tegra/
Dclock.c798 | PLLP_OUT2_OVR | PLLP_OUT2_CLKEN | PLLP_OUT2_RSTN_DIS in tegra30_set_up_pllp()