| /external/llvm/lib/CodeGen/ |
| D | LLVMTargetMachine.cpp | 137 TargetPassConfig *PassConfig = TM->createPassConfig(PM); in addPassesToGenerateCode() local
138 PassConfig->setStartStopPasses(StartBefore, StartAfter, StopAfter); in addPassesToGenerateCode()
141 PassConfig->setDisableVerify(DisableVerify); in addPassesToGenerateCode()
143 PM.add(PassConfig); in addPassesToGenerateCode()
145 PassConfig->addIRPasses(); in addPassesToGenerateCode()
147 PassConfig->addCodeGenPrepare(); in addPassesToGenerateCode()
149 PassConfig->addPassesToHandleExceptions(); in addPassesToGenerateCode()
151 PassConfig->addISelPrepare(); in addPassesToGenerateCode()
165 if (PassConfig->addIRTranslator()) in addPassesToGenerateCode()
170 PassConfig->addPreRegBankSelect(); in addPassesToGenerateCode()
[all …]
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| D | PostRASchedulerList.cpp | 289 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction() local
299 if (!enablePostRAScheduler(Fn.getSubtarget(), PassConfig->getOptLevel(), in runOnMachineFunction()
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| D | MachineScheduler.cpp | 102 MF(nullptr), MLI(nullptr), MDT(nullptr), PassConfig(nullptr), AA(nullptr), LIS(nullptr) { in MachineSchedContext()
290 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
303 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
343 PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
380 PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
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| D | MachineBlockPlacement.cpp | 1662 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction() local
1666 PassConfig->getEnableTailMerge() && in runOnMachineFunction()
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| D | BranchFolding.cpp | 97 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction() local
101 PassConfig->getEnableTailMerge(); in runOnMachineFunction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LLVMTargetMachine.cpp | 104 TargetPassConfig *PassConfig = TM->createPassConfig(PM); in addPassesToGenerateCode() local
106 PassConfig->setDisableVerify(DisableVerify); in addPassesToGenerateCode()
107 WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline(); in addPassesToGenerateCode()
108 PM.add(PassConfig); in addPassesToGenerateCode()
113 if (PassConfig->addISelPasses()) in addPassesToGenerateCode()
115 PassConfig->addMachinePasses(); in addPassesToGenerateCode()
116 PassConfig->setInitialized(); in addPassesToGenerateCode()
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| D | PostRASchedulerList.cpp | 289 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction() local
299 if (!enablePostRAScheduler(Fn.getSubtarget(), PassConfig->getOptLevel(), in runOnMachineFunction()
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| D | MachineBlockPlacement.cpp | 2761 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction() local
2764 if (PassConfig->getOptLevel() >= CodeGenOpt::Aggressive) { in runOnMachineFunction()
2788 PassConfig->getEnableTailMerge() && in runOnMachineFunction()
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| D | MachineScheduler.cpp | 317 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
330 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
370 PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
408 PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
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| D | BranchFolding.cpp | 124 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction() local
128 PassConfig->getEnableTailMerge(); in runOnMachineFunction()
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| /external/tensorflow/tensorflow/compiler/mlir/lite/common/ |
| D | tfl_pass_config.h | 29 struct PassConfig { struct
30 explicit PassConfig(QuantizationSpecs specs) in PassConfig() argument
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| /external/tensorflow/tensorflow/compiler/mlir/lite/ |
| D | tf_tfl_passes.h | 27 void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config,
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| D | tf_tfl_passes.cc | 58 void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config, in AddTFToTFLConversionPasses()
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| D | tf_tfl_translate.cc | 179 mlir::TFL::PassConfig pass_config(quant_specs); in main()
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| /external/tensorflow/tensorflow/compiler/mlir/lite/python/ |
| D | graphdef_to_tfl_flatbuffer.cc | 275 mlir::TFL::PassConfig pass_config(quant_specs); in ConvertGraphDefToTFLiteFlatBuffer()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineScheduler.h | 104 const TargetPassConfig *PassConfig; member
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineScheduler.h | 123 const TargetPassConfig *PassConfig = nullptr; member
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