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Searched refs:PredPos (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp443 unsigned PredR, PredPos, PredRegFlags; in findInductionRegister() local
444 if (!TII->getPredReg(Cond, PredR, PredPos, PredRegFlags)) in findInductionRegister()
615 unsigned PredReg, PredPos, PredRegFlags; in getLoopTripCount() local
616 if (!TII->getPredReg(Cond, PredReg, PredPos, PredRegFlags)) in getLoopTripCount()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp462 unsigned PredR, PredPos, PredRegFlags; in findInductionRegister() local
463 if (!TII->getPredReg(Cond, PredR, PredPos, PredRegFlags)) in findInductionRegister()
648 unsigned PredReg, PredPos, PredRegFlags; in getLoopTripCount() local
649 if (!TII->getPredReg(Cond, PredReg, PredPos, PredRegFlags)) in getLoopTripCount()
/external/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.cpp1702 unsigned PredPos = ScheduledSUnitsInv[Pred->NodeNum]; in moveLowLatencies() local
1703 if (PredPos >= MinPos) in moveLowLatencies()
1704 MinPos = PredPos + 1; in moveLowLatencies()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.cpp1850 unsigned PredPos = ScheduledSUnitsInv[Pred->NodeNum]; in moveLowLatencies() local
1851 if (PredPos >= MinPos) in moveLowLatencies()
1852 MinPos = PredPos + 1; in moveLowLatencies()
/external/llvm/lib/Analysis/
DScalarEvolution.cpp5641 for (unsigned i = 1, PredPos = 1; i < NumExits; ++i) { in BackedgeTakenInfo() local
5644 Ptr = &ENT[PredPos++]; in BackedgeTakenInfo()