Home
last modified time | relevance | path

Searched refs:QCA953X_SRIF_DDR_DPLL2_REG (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/qca953x/
Dlowlevel_init.S131 sw t1, QCA953X_SRIF_DDR_DPLL2_REG(t0)
/external/u-boot/arch/mips/mach-ath79/include/mach/
Dar71xx_regs.h1193 #define QCA953X_SRIF_DDR_DPLL2_REG 0x244 macro