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Searched refs:REG_CLR (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/mediatek/mt8173/drivers/crypt/
Dcrypt.c31 #define REG_CLR 513 macro
49 crypt_write32(REG_CLR, crypt_read32(REG_STAT)); in crypt_wait()
68 crypt_write32(REG_CLR, 1); in crypt_set_hdcp_key_ex()
/external/u-boot/arch/arm/mach-imx/mx7/
Dpsci-mx7.c62 #define REG_CLR 0x8 macro
499 ANATOP_BASE_ADDR + ANADIG_ARM_PLL + REG_CLR); in imx_pll_resume()
501 ANATOP_BASE_ADDR + ANADIG_DDR_PLL + REG_CLR); in imx_pll_resume()
503 ANATOP_BASE_ADDR + ANADIG_SYS_PLL + REG_CLR); in imx_pll_resume()
505 ANATOP_BASE_ADDR + ANADIG_ENET_PLL + REG_CLR); in imx_pll_resume()
507 ANATOP_BASE_ADDR + ANADIG_AUDIO_PLL + REG_CLR); in imx_pll_resume()
509 ANATOP_BASE_ADDR + ANADIG_VIDEO_PLL + REG_CLR); in imx_pll_resume()