| /external/rust/crates/syn/0.15.42/tests/ |
| D | clone.sh | 3 REV=d132f544f9d74e3cc047ef211e57eae60b78e5c5
10 if [ "$(cat rust/COMMIT)" != "$REV" ]; then
13 curl -L "https://github.com/rust-lang/rust/archive/${REV}.tar.gz" \
15 echo "$REV" > rust/COMMIT
|
| /external/rust/crates/syn/1.0.7/tests/ |
| D | clone.sh | 3 REV=7979016aff545f7b41cc517031026020b340989d
10 if [ "$(cat rust/COMMIT)" != "$REV" ]; then
13 curl -L "https://github.com/rust-lang/rust/archive/${REV}.tar.gz" \
15 echo "$REV" > rust/COMMIT
|
| /external/llvm/utils/crosstool/ |
| D | create-snapshots.sh | 20 readonly REV="${1:-$(getLatestRevisionFromSVN)}"
25 echo "Running: svn export -r ${REV} ${module}; log in ${log}"
26 svn -q export -r ${REV} ${LLVM_PROJECT_SVN}/${module}/trunk \
30 local tarball="${module}-${REV}.tar.bz2"
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/crosstool/ |
| D | create-snapshots.sh | 20 readonly REV="${1:-$(getLatestRevisionFromSVN)}"
25 echo "Running: svn export -r ${REV} ${module}; log in ${log}"
26 svn -q export -r ${REV} ${LLVM_PROJECT_SVN}/${module}/trunk \
30 local tarball="${module}-${REV}.tar.bz2"
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | select-bitcast-bigendian.mir | 13 ; CHECK: [[REV:%[0-9]+]]:fpr64 = REV64v2i32 [[COPY]]
14 ; CHECK: $x0 = COPY [[REV]]
|
| /external/llvm/docs/ |
| D | BigEndianNEON.rst | 78 …DR + REV`` and similarly ``LDR == LD1 + REV`` (on a big endian system), we can simulate either typ…
97 1. Insert a ``REV`` instruction to reverse the lane order after every ``LDR``.
133 … to avoid alignment faults (the result of the ``LD1`` would then need to be reversed with ``REV``).
145 | Lane ordering | ``LDR + REV`` | ``LD1`` |
147 | AAPCS | ``LDR`` | ``LD1 + REV`` |
149 | Alignment for strict mode | ``LDR`` / ``LD1 + REV`` | ``LD1`` |
161 2. Create code generation patterns for bitconverts that create ``REV`` instructions.
188 …REV`` undoing the ``LD1`` of type ``X`` (converting the in-register representation to the same as …
202 It turns out that these ``REV`` pairs can, in almost all cases, be squashed together into a single …
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | BigEndianNEON.rst | 78 …DR + REV`` and similarly ``LDR == LD1 + REV`` (on a big endian system), we can simulate either typ…
97 1. Insert a ``REV`` instruction to reverse the lane order after every ``LDR``.
133 … to avoid alignment faults (the result of the ``LD1`` would then need to be reversed with ``REV``).
145 | Lane ordering | ``LDR + REV`` | ``LD1`` |
147 | AAPCS | ``LDR`` | ``LD1 + REV`` |
149 | Alignment for strict mode | ``LDR`` / ``LD1 + REV`` | ``LD1`` |
161 2. Create code generation patterns for bitconverts that create ``REV`` instructions.
188 …REV`` undoing the ``LD1`` of type ``X`` (converting the in-register representation to the same as …
202 It turns out that these ``REV`` pairs can, in almost all cases, be squashed together into a single …
|
| /external/e2fsprogs/lib/ext2fs/ |
| D | utf8n.h | 31 #define UNICODE_AGE(MAJ, MIN, REV) \ argument
34 ((unsigned int)(REV)))
|
| D | nls_utf8.c | 38 #define UNICODE_AGE(MAJ, MIN, REV) \ argument
41 ((unsigned int)(REV)))
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
| D | bswap.ll | 193 ; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 %a)
194 ; CHECK-NEXT: ret i16 [[REV]]
207 ; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 %a)
208 ; CHECK-NEXT: ret i16 [[REV]]
221 ; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 [[TRUNC]])
222 ; CHECK-NEXT: ret i16 [[REV]]
|
| /external/vixl/test/aarch32/config/ |
| D | cond-rd-rn-t32.json | 35 "Rev", // REV{<c>}{<q>} <Rd>, <Rm> ; T1
36 // REV{<c>}{<q>} <Rd>, <Rm> ; T2
|
| D | cond-rd-rn-a32.json | 31 "Rev", // REV{<c>}{<q>} <Rd>, <Rm> ; A1
|
| /external/libavc/encoder/ |
| D | ih264e_cabac.h | 55 #define REV(u4_input, u4_output) \ macro
|
| /external/openssh/ |
| D | buildpkg.sh.in | 252 VERSION=$VERSION$REV
659 echo | pkgtrans -os ${FAKE_ROOT} ${START}/$PKGNAME-$VERSION$REV-$UNAME_S-$ARCH.pkg
670 echo | pkgtrans -os ${FAKE_ROOT} ${START}/$PKGNAME-$VERSION$REV-$UNAME_S-$ARCH.pkg
|
| /external/f2fs-tools/lib/ |
| D | nls_utf8.c | 36 #define UNICODE_AGE(MAJ, MIN, REV) \ argument
39 ((unsigned int)(REV)))
|
| /external/mdnsresponder/mDNSShared/ |
| D | CommonServices.h | 1182 #define NumVersionBuild( MAJOR, MINOR, BUGFIX, STAGE, REV ) \ argument
1187 ( ( ( REV ) & 0xFF ) ) )
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 342 # REV/REV16/REVSH
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 342 # REV/REV16/REVSH
|
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| D | vpaes-armv7.S | 1050 @ cost of extra REV and VREV32 operations in little-endian ARM.
1152 @ cost of extra REV and VREV32 operations in little-endian ARM.
|
| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| D | vpaes-armv7.S | 1023 @ cost of extra REV and VREV32 operations in little-endian ARM.
1123 @ cost of extra REV and VREV32 operations in little-endian ARM.
|
| /external/v8/src/codegen/arm64/ |
| D | constants-arm64.h | 1050 REV = DataProcessing1SourceFixed | 0x00000800, enumerator
1051 REV_w = REV,
1052 REV32_x = REV | SixtyFourBits,
|
| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 1281 REV = DataProcessing1SourceFixed | 0x00000800, enumerator
1282 REV_w = REV,
1283 REV32_x = REV | SixtyFourBits,
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 472 @ REV/REV16/REVSH
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 472 @ REV/REV16/REVSH
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedM1.td | 329 def : InstRW<[M1WriteNALU1], (instregex "^REV(16|32|64)v")>;
|