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/external/libcups/cups/
Dtest2.ppd215 *Font AvantGarde-Book: Standard "(001.006S)" Standard ROM
216 *Font AvantGarde-BookOblique: Standard "(001.006S)" Standard ROM
217 *Font AvantGarde-Demi: Standard "(001.007S)" Standard ROM
218 *Font AvantGarde-DemiOblique: Standard "(001.007S)" Standard ROM
219 *Font Bookman-Demi: Standard "(001.004S)" Standard ROM
220 *Font Bookman-DemiItalic: Standard "(001.004S)" Standard ROM
221 *Font Bookman-Light: Standard "(001.004S)" Standard ROM
222 *Font Bookman-LightItalic: Standard "(001.004S)" Standard ROM
223 *Font Courier: Standard "(002.004S)" Standard ROM
224 *Font Courier-Bold: Standard "(002.004S)" Standard ROM
[all …]
Dtest.ppd234 *Font AvantGarde-Book: Standard "(001.006S)" Standard ROM
235 *Font AvantGarde-BookOblique: Standard "(001.006S)" Standard ROM
236 *Font AvantGarde-Demi: Standard "(001.007S)" Standard ROM
237 *Font AvantGarde-DemiOblique: Standard "(001.007S)" Standard ROM
238 *Font Bookman-Demi: Standard "(001.004S)" Standard ROM
239 *Font Bookman-DemiItalic: Standard "(001.004S)" Standard ROM
240 *Font Bookman-Light: Standard "(001.004S)" Standard ROM
241 *Font Bookman-LightItalic: Standard "(001.004S)" Standard ROM
242 *Font Courier: Standard "(002.004S)" Standard ROM
243 *Font Courier-Bold: Standard "(002.004S)" Standard ROM
[all …]
/external/arm-trusted-firmware/docs/components/
Dromlib-design.rst1 Library at ROM
4 This document provides an overview of the "library at ROM" implementation in
10 The "library at ROM" feature allows platforms to build a library of functions to
11 be placed in ROM. This reduces SRAM usage by utilising the available space in
12 ROM. The "library at ROM" contains a jump table with the list of functions that
13 are placed in ROM. The capabilities of the "library at ROM" are:
17 2. Functions can be patched after they have been programmed into ROM.
19 3. Platform-specific libraries can be placed in ROM.
29 Library at ROM is described by an index file with the list of functions to be
30 placed in ROM. The index file is platform specific and its format is:
[all …]
/external/u-boot/board/synopsys/iot_devkit/
Du-boot.lds10 ROM : ORIGIN = ROM_BASE, LENGTH = ROM_SIZE
26 } > ROM
34 } > ROM
39 } > ROM
48 } > ROM
56 * copied from ROM to RAM in board_early_init_f().
63 } > RAM AT > ROM
/external/arm-trusted-firmware/bl1/
Dbl1.ld.S16 ROM (rx): ORIGIN = BL1_RO_BASE, LENGTH = BL1_RO_LIMIT - BL1_RO_BASE
34 } >ROM
39 } >ROM
43 } >ROM
70 } >ROM
95 } >ROM
119 } >RAM AT>ROM
/external/arm-trusted-firmware/bl2/
Dbl2_el3.ld.S17 ROM (rx): ORIGIN = BL2_RO_BASE, LENGTH = BL2_RO_LIMIT - BL2_RO_BASE
25 #define ROM RAM macro
51 } >ROM
84 } >ROM
133 } >ROM
160 } >RAM AT>ROM
/external/u-boot/arch/xtensa/cpu/
Du-boot.lds17 * U-Boot resets from SYSROM and unpacks itself from a ROM store to RAM.
19 * above it for the ROM store into which the rest of U-Boot is packed.
20 * The ROM store also needs to be above any other vectors that are in ROM.
21 * If a core has its vectors near the top of ROM, this must be edited.
23 * Note that to run C code out of ROM, the processor would have to support
28 * other means (serial ROM, for example) or are initialized early (requiring
91 * On many Xtensa boards a region of RAM may be mapped to the ROM address
105 "U-Boot ROM image is too large. Check optimization level.")
/external/u-boot/doc/board/renesas/
Dsh7752evb.rst13 - SPI ROM 8MB
32 You can write MAC address to SPI ROM.
58 Update SPI ROM
69 3. Erase SPI ROM.
75 4. Write u-boot image to SPI ROM.
Dsh7753evb.rst13 - SPI ROM 8MB
32 You can write MAC address to SPI ROM.
58 Update SPI ROM
69 3. Erase SPI ROM.
75 4. Write u-boot image to SPI ROM.
/external/u-boot/board/renesas/sh7757lcr/
DREADME.sh7757lcr12 - SPI ROM 8MB
43 You can write MAC address to SPI ROM.
67 Update SPI ROM:
74 3. Erase SPI ROM.
76 4. Write u-boot image to SPI ROM.
/external/python/cpython2/Doc/library/
Dcd.rst2 :mod:`cd` --- CD-ROM access on SGI systems
7 :synopsis: Interface to the CD-ROM on Silicon Graphics systems.
18 The way the library works is as follows. A program opens the CD-ROM device with
21 data from the CD, but also to get status information for the CD-ROM device, and
54 Open the CD-ROM device. The return value is an opaque player object; methods of
57 the hardware inventory is consulted to locate a CD-ROM drive. The *mode*, if
93 The drive is loaded with a CD-ROM. Subsequent play or read operations will
114 The equivalent of :const:`PAUSED` on older (non 3301) model Toshiba CD-ROM
141 Unlocks the eject button on the CD-ROM drive permitting the user to eject the
149 flow of data from the CD-ROM drive.
[all …]
/external/arm-trusted-firmware/lib/romlib/
Dromlib.ld.S11 ROM (rx): ORIGIN = ROMLIB_RO_BASE, LENGTH = ROMLIB_RO_LIMIT - ROMLIB_RO_BASE
26 } >ROM
34 } >RAM AT>ROM
/external/arm-trusted-firmware/docs/plat/
Dstm32mp1.rst13 The STM32MP1 resets in the ROM code of the Cortex-A7.
16 The ROM code boot sequence loads the TF-A binary image from boot device
20 for ROM code is able to load this image.
35 | | ROM
70 ROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot)
74 ROM code -> BL2 (compiled with BL2_AT_EL3) -> OP-TEE -> BL33 (U-Boot)
Dintel-agilex.rst6 Upon boot, Boot ROM loads bl2 into OCRAM. Bl2 subsequently initializes
11 Boot ROM --> Trusted Firmware-A --> UEFI
45 BL33=PEI.ROM
Dsocionext-uniphier.rst7 UniPhier SoC family implements its internal boot ROM, which loads 64KB [1]_
10 It is useful for platforms with non-TF-A boot ROM, like UniPhier. Here, a
27 ROM (and verified if the chip fuses are blown).
33 1. The Boot ROM
35 This is hard-wired ROM, so never corrupted. It loads the UniPhier BL (with
Dintel-stratix10.rst6 Upon boot, Boot ROM loads bl2 into OCRAM. Bl2 subsequently initializes
11 Boot ROM --> Trusted Firmware-A --> UEFI
45 BL33=PEI.ROM
/external/u-boot/board/synopsys/emsdp/
DREADME44 * 256 KiB of "ROM"
45 - This so-called "ROM" is a part of FPGA image and even though it
65 3. To build binary image to be put in "ROM":
73 1. The EMSDP board is supposed to auto-start U-Boot image stored in ROM on
77 in "ROM" and start it from the debugger. One important note here we first
78 need to enable writes into "ROM" by writing 1 to 0xf0001000.
/external/u-boot/doc/board/AndesTech/
Dadp-ag101p.rst25 If you want to boot this system from SPI ROM and bypass e-bios (the
26 other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
37 Burn U-Boot to SPI ROM
/external/u-boot/board/ti/am65x/
DREADME20 On AM65x family devices, ROM supports boot only via MCU(R5). This means that
40 | | *ROM* |----------|-->| Reset rls | | |
43 | | ROM | | : | |
46 | | | | | *R5 ROM* | | |
215 ROM supports booting from eMMC from boot0 partition offset 0x0
233 To give the ROM access to the boot partition, the following commands must be
267 ROM supports booting from MCU_UART0 via X-Modem protocol. The entire UART-based
273 Boot ROM | tiboot3.bin | MCU_UART0 | X-Modem(*)
/external/u-boot/arch/arm/mach-omap2/
Dlowlevel_init.S53 push {r4-r12, lr} @ save registers - ROM code may pollute
61 @ call ROM Code API for the service requested
66 push {r4-r12, lr} @ save registers - ROM code may pollute
/external/u-boot/doc/SPL/
DREADME.am335x-network4 have support for booting via network in ROM. The following describes
49 Identifier (VCI) set by BOOTP client (RBL sets VCI to "DM814x ROM v1.0"
60 if substring (option vendor-class-identifier, 0, 10) = "DM814x ROM" {
69 May the ROM bootloader sends another "vendor-class-identifier"
71 "AM335x ROM"
/external/u-boot/fs/cbfs/
DKconfig5 filesystem. This is a ROM-based filesystem used for accessing files
14 filesystem. This is a ROM-based filesystem used for accessing files
/external/u-boot/doc/board/google/
Dchromebook_link.rst12 * video ROM - sets up the display
26 As for the video ROM, you can get it `here`_ and rename it to vga.bin.
/external/u-boot/arch/arm/dts/
Darmada-8040-clearfog-gt-8k.dts214 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
215 * [14] CP1 SPI1 CS0n (64Mb SPI ROM)
216 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)
217 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
/external/u-boot/arch/arm/mach-k3/
DKconfig24 specify the total size of SPL as ROM can use some part
25 of this RAM. Once ROM gives control to SPL then this
33 Describes the maximum size of the image that ROM can download
55 Address at which ROM stores the value which determines if SPL

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