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Searched refs:RST_BUS_SPI0 (Results 1 – 18 of 18) sorted by relevance

/external/u-boot/include/dt-bindings/reset/
Dsun8i-v3s-ccu.h61 #define RST_BUS_SPI0 15 macro
Dsun8i-a23-a33-ccu.h59 #define RST_BUS_SPI0 13 macro
Dsun8i-a83t-ccu.h63 #define RST_BUS_SPI0 15 macro
Dsun50i-a64-ccu.h62 #define RST_BUS_SPI0 16 macro
Dsun9i-a80-ccu.h56 #define RST_BUS_SPI0 10 macro
Dsun8i-h3-ccu.h63 #define RST_BUS_SPI0 15 macro
Dsun50i-h6-ccu.h40 #define RST_BUS_SPI0 31 macro
Dsun8i-r40-ccu.h65 #define RST_BUS_SPI0 17 macro
/external/u-boot/drivers/clk/sunxi/
Dclk_v3s.c37 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
Dclk_a23.c49 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
Dclk_a83t.c52 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
Dclk_a80.c37 [RST_BUS_SPI0] = RESET(0x5a0, BIT(20)),
Dclk_a64.c54 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
Dclk_h6.c58 [RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
Dclk_h3.c62 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
Dclk_r40.c65 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
/external/u-boot/arch/arm/dts/
Dsunxi-h3-h5.dtsi556 resets = <&ccu RST_BUS_SPI0>;
Dsun50i-a64.dtsi768 resets = <&ccu RST_BUS_SPI0>;