Searched refs:RegCount (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86AsmBackend.cpp | 719 uint32_t encodeCompactUnwindRegistersWithoutFrame(unsigned RegCount) const { in encodeCompactUnwindRegistersWithoutFrame()
733 for (unsigned i = 0; i < RegCount; ++i) { in encodeCompactUnwindRegistersWithoutFrame()
743 for (unsigned i = CU_NUM_SAVED_REGS - RegCount; i < CU_NUM_SAVED_REGS; ++i){ in encodeCompactUnwindRegistersWithoutFrame()
745 for (unsigned j = CU_NUM_SAVED_REGS - RegCount; j < i; ++j) in encodeCompactUnwindRegistersWithoutFrame()
754 switch (RegCount) { in encodeCompactUnwindRegistersWithoutFrame()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86AsmBackend.cpp | 735 uint32_t encodeCompactUnwindRegistersWithoutFrame(unsigned RegCount) const { in encodeCompactUnwindRegistersWithoutFrame()
749 for (unsigned i = 0; i < RegCount; ++i) { in encodeCompactUnwindRegistersWithoutFrame()
759 for (unsigned i = CU_NUM_SAVED_REGS - RegCount; i < CU_NUM_SAVED_REGS; ++i){ in encodeCompactUnwindRegistersWithoutFrame()
761 for (unsigned j = CU_NUM_SAVED_REGS - RegCount; j < i; ++j) in encodeCompactUnwindRegistersWithoutFrame()
770 switch (RegCount) { in encodeCompactUnwindRegistersWithoutFrame()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.cpp | 1362 SizeT RegCount) const { in emitSRegsAsText()
1369 for (SizeT i = 0; i < RegCount; ++i) { in emitSRegsAsText()
1381 SizeT RegCount, in emitSRegsOp() argument
1387 emitSRegs(Func, Form, BaseReg, RegCount); in emitSRegsOp()
1436 SizeT RegCount = 0; in emitUsingForm() local
1442 RegCount = 1; in emitUsingForm()
1443 } else if (RegCount < VpushVpopMaxConsecRegs && in emitUsingForm()
1445 ++RegCount; in emitUsingForm()
1447 InstData.emplace_back(BaseReg, RegCount); in emitUsingForm()
1449 RegCount = 1; in emitUsingForm()
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| D | IceInstARM32.h | 1214 SizeT RegCount, SizeT InstIndex) const;
1225 const Variable *BaseReg, SizeT RegCount) const = 0;
1252 SizeT RegCount) const final;
1280 SizeT RegCount) const final;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.h | 1014 SmallVector<unsigned, 4> RegCount; member
1036 RegCount.push_back(RHS.Regs.size()); in append()
1065 return std::accumulate(RegCount.begin(), RegCount.end(), 0) > 1; in occupiesMultipleRegs()
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| D | SelectionDAGBuilder.cpp | 749 RegCount(1, regs.size()), CallConv(CC) {} in RegsForValue()
770 RegCount.push_back(NumRegs); in RegsForValue()
791 unsigned NumRegs = RegCount[Value]; in getCopyFromRegs()
873 unsigned NumParts = RegCount[Value]; in getCopyToRegs()
975 for (auto CountAndVT : zip_first(RegCount, RegVTs)) { in getRegsAndSizes()
976 unsigned RegCount = std::get<0>(CountAndVT); in getRegsAndSizes() local
979 for (unsigned E = I + RegCount; I != E; ++I) in getRegsAndSizes()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 129 unsigned RegCount = getMaxWorkGroupSGPRCount(MF); in reservedPrivateSegmentWaveByteOffsetReg() local
133 if (RegCount & 3) { in reservedPrivateSegmentWaveByteOffsetReg()
136 Reg = RegCount - 1; in reservedPrivateSegmentWaveByteOffsetReg()
140 Reg = RegCount - 5; in reservedPrivateSegmentWaveByteOffsetReg()
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| /external/v8/src/interpreter/ |
| D | bytecode-operands.h | 34 V(RegCount, OperandTypeInfo::kScalableUnsignedByte)
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 115 static unsigned findPrivateSegmentWaveByteOffsetRegIndex(unsigned RegCount) { in findPrivateSegmentWaveByteOffsetRegIndex() argument
119 if (RegCount & 3) { in findPrivateSegmentWaveByteOffsetRegIndex()
122 Reg = RegCount - 1; in findPrivateSegmentWaveByteOffsetRegIndex()
126 Reg = RegCount - 5; in findPrivateSegmentWaveByteOffsetRegIndex()
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| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 6005 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count"); in EmitVAArg() local
6007 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV, in EmitVAArg()
6020 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count"); in EmitVAArg()
6040 CGF.Builder.CreateAdd(RegCount, One, "reg_count"); in EmitVAArg()
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