Searched refs:SBFM (Results 1 – 12 of 12) sorted by relevance
/external/llvm/test/CodeGen/AArch64/ |
D | bitfield-extract.ll | 84 ; SHR with multiple uses is fine as SXTH and SBFX are both aliases of SBFM.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | bitfield-extract.ll | 84 ; SHR with multiple uses is fine as SXTH and SBFX are both aliases of SBFM.
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeARM_64.c | 114 #define SBFM 0x93000000 macro 718 return push_inst(compiler, (SBFM ^ inv_bits) | RD(dst) | RN(arg2) | (7 << 10)); in emit_op_imm() 726 return push_inst(compiler, (SBFM ^ inv_bits) | RD(dst) | RN(arg2) | (15 << 10)); in emit_op_imm() 736 return push_inst(compiler, SBFM | (1 << 22) | RD(dst) | RN(arg2) | (31 << 10)); in emit_op_imm()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SchedCyclone.td | 169 // ASRV,LSLV,LSRV,RORV,BFM,SBFM,UBFM
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D | AArch64InstrInfo.td | 1005 defm SBFM : BitfieldImm<0b00, "sbfm">; 5321 // To sign extend, we use a signed bitfield move instruction (SBFM) on the
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedCyclone.td | 171 // ASRV,LSLV,LSRV,RORV,BFM,SBFM,UBFM
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D | AArch64InstrInfo.td | 1201 defm SBFM : BitfieldImm<0b00, "sbfm">; 5713 // To sign extend, we use a signed bitfield move instruction (SBFM) on the
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/external/v8/src/codegen/arm64/ |
D | constants-arm64.h | 675 SBFM = SBFM_w, enumerator
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D | assembler-arm64.cc | 978 Emit(SF(rd) | SBFM | N | ImmR(immr, rd.SizeInBits()) | in sbfm()
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 684 SBFM = SBFM_w, enumerator
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D | assembler-aarch64.cc | 696 Emit(SF(rd) | SBFM | N | ImmR(immr, rd.GetSizeInBits()) | in sbfm()
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2311 ### SBFM ### subsection
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