Home
last modified time | relevance | path

Searched refs:SCLK (Results 1 – 22 of 22) sorted by relevance

/external/u-boot/board/renesas/stout/
Dcpld.c15 #define SCLK (92 + 24) macro
34 gpio_set_value(SCLK, 1); in cpld_read()
36 gpio_set_value(SCLK, 0); in cpld_read()
41 gpio_set_value(SCLK, 1); in cpld_read()
42 gpio_set_value(SCLK, 0); in cpld_read()
46 gpio_set_value(SCLK, 1); in cpld_read()
49 gpio_set_value(SCLK, 0); in cpld_read()
61 gpio_set_value(SCLK, 1); in cpld_write()
63 gpio_set_value(SCLK, 0); in cpld_write()
68 gpio_set_value(SCLK, 1); in cpld_write()
[all …]
/external/arm-trusted-firmware/drivers/renesas/rcar/cpld/
Dulcb_cpld.c10 #define SCLK 8 /* GP_6_8 */ macro
72 gpio_set_value(GPIO_OUTDT6, SCLK, 1); in cpld_write()
74 gpio_set_value(GPIO_OUTDT6, SCLK, 0); in cpld_write()
80 gpio_set_value(GPIO_OUTDT6, SCLK, 1); in cpld_write()
82 gpio_set_value(GPIO_OUTDT6, SCLK, 0); in cpld_write()
88 gpio_set_value(GPIO_OUTDT6, SCLK, 1); in cpld_write()
89 gpio_set_value(GPIO_OUTDT6, SCLK, 0); in cpld_write()
95 gpio_pfc(PFC_GPSR6, SCLK); in cpld_init()
99 gpio_set_value(GPIO_IOINTSEL6, SCLK, 0); in cpld_init()
100 gpio_set_value(GPIO_OUTDT6, SCLK, 0); in cpld_init()
[all …]
/external/u-boot/drivers/rtc/
Dds1302.c14 #define SCLK 0x400 macro
18 #define RESET rtc_go_low(RST), rtc_go_low(SCLK)
19 #define N_RESET rtc_go_high(RST), rtc_go_low(SCLK)
21 #define CLOCK_HIGH rtc_go_high(SCLK)
22 #define CLOCK_LOW rtc_go_low(SCLK)
198 rtc_go_output(DATA|SCLK|RST); in rtc_init()
/external/libxkbcommon/xkbcommon/test/data/symbols/
Dpc71 key <SCLK> { [ Scroll_Lock ] };
Dgroup430 key <SCLK> {
/external/u-boot/include/
Dsym53c8xx.h187 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
/external/libxkbcommon/xkbcommon/test/data/keycodes/
Devdev95 <SCLK> = 78;
Dxfree8699 <SCLK> = 78;
Devdev-xkbcommon347 alias <SCLK> = <SCROLLLOCK>;
/external/libxkbcommon/xkbcommon/test/data/symbols/macintosh_vndr/
Dapple21 // key <SCLK> { [ F14 ] }; // should be keycode 123 or
/external/u-boot/arch/arm/dts/
Darmada-385-turris-omnia.dts377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/external/libxkbcommon/xkbcommon/test/data/keymaps/
Dno-types.xkb74 <SCLK> = 78;
860 key <SCLK> { [ Scroll_Lock ] };
Dsyntax-error.xkb74 <SCLK> = 78;
1273 key <SCLK> { [ Scroll_Lock ] };
1576 { <SCLK>, "NORM", 1, color="white" },
Dcomprehensive-plus-geom.xkb74 <SCLK> = 78;
1272 key <SCLK> { [ Scroll_Lock ] };
1575 { <SCLK>, "NORM", 1, color="white" },
Dno-aliases.xkb74 <SCLK> = 78;
1146 key <SCLK> { [ Scroll_Lock ] };
Dunbound-vmod.xkb74 <SCLK> = 78;
1334 key <SCLK> { [ Scroll_Lock ] };
Dhost.xkb74 <SCLK> = 78;
1483 key <SCLK> { [ Scroll_Lock ] };
Dquartz.xkb901 { <SCLK>, "NORM", 1, color="white" },
Dstringcomp.data74 <SCLK> = 78;
1614 key <SCLK> { [ Scroll_Lock ] };
/external/u-boot/drivers/video/
DKconfig395 string "SPI SCLK pin for LCD related config job"
/external/cpuinfo/test/dmesg/
Dgalaxy-s6.log828 [ 0.556872] [6: swapper/0: 1] samsung-uart 13630000.uart: Set SCLK frequency to 2000000…
834 [ 0.557313] [6: swapper/0: 1] samsung-uart 14c20000.uart: SCLK frequency is not defined
840 [ 0.557640] [6: swapper/0: 1] samsung-uart 14c30000.uart: SCLK frequency is not defined
846 [ 0.557950] [6: swapper/0: 1] samsung-uart 14c40000.uart: SCLK frequency is not defined
848 [ 0.558312] [6: swapper/0: 1] samsung-uart 11460000.uart: Set SCLK frequency to 1170000…
/external/u-boot/
DREADME1826 the i2c SCLK line directly, either by using the