Home
last modified time | relevance | path

Searched refs:SCTLR (Results 1 – 25 of 31) sorted by relevance

12

/external/arm-trusted-firmware/lib/psci/aarch32/
Dpsci_helpers.S89 ldcopr r0, SCTLR
91 stcopr r0, SCTLR
109 ldcopr r1, SCTLR
111 stcopr r1, SCTLR
/external/arm-trusted-firmware/lib/xlat_tables_v2/aarch32/
Denable_mmu.S18 ldcopr r1, SCTLR
56 ldcopr r1, SCTLR
64 stcopr r1, SCTLR
/external/arm-trusted-firmware/lib/cpus/aarch32/
Daem_generic.S15 ldcopr r0, SCTLR
31 ldcopr r0, SCTLR
Dcortex_a32.S56 ldcopr r0, SCTLR
87 ldcopr r0, SCTLR
Dcortex_a72.S146 ldcopr r0, SCTLR
193 ldcopr r0, SCTLR
Dcortex_a53.S224 ldcopr r0, SCTLR
254 ldcopr r0, SCTLR
Dcortex_a12.S15 ldcopr r0, SCTLR
Dcortex_a5.S15 ldcopr r0, SCTLR
Dcortex_a7.S15 ldcopr r0, SCTLR
Dcortex_a9.S15 ldcopr r0, SCTLR
Dcortex_a15.S21 ldcopr r0, SCTLR
Dcortex_a17.S15 ldcopr r0, SCTLR
Dcortex_a57.S487 ldcopr r0, SCTLR
529 ldcopr r0, SCTLR
/external/arm-trusted-firmware/include/arch/aarch32/
Del3_common_macros.S31 ldcopr r0, SCTLR
33 stcopr r0, SCTLR
237 stcopr r0, SCTLR
/external/arm-trusted-firmware/bl2u/aarch32/
Dbl2u_entrypoint.S48 ldcopr r0, SCTLR
51 stcopr r0, SCTLR
/external/arm-trusted-firmware/bl2/aarch32/
Dbl2_entrypoint.S49 ldcopr r0, SCTLR
52 stcopr r0, SCTLR
/external/u-boot/arch/arm/cpu/armv7/sunxi/
Dfel_utils.S19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
37 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register
/external/u-boot/arch/arm/mach-uniphier/arm32/
Dlowlevel_init.S23 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
42 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
74 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
Dpsci_smp.S14 mrc p15, 0, r1, c1, c0, 0 @ SCTLR (System Control Register)
/external/arm-trusted-firmware/bl1/aarch32/
Dbl1_exceptions.S122 ldcopr r9, SCTLR
124 stcopr r9, SCTLR
/external/arm-trusted-firmware/lib/aarch32/
Dmisc_helpers.S178 ldcopr r0, SCTLR
180 stcopr r0, SCTLR
/external/u-boot/arch/arm/cpu/armv7/
Dstart.S71 mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
73 mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register
Dpsci.S265 mrc p15, 0, r0, c1, c0, 0 @ SCTLR
267 mcr p15, 0, r0, c1, c0, 0 @ SCTLR
/external/OpenCSD/decoder/tests/snapshots/trace_cov_a15/
Ddevice1.ini157 SCTLR=0x00C5187D key
/external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/
Ddevice1.ini157 SCTLR=0x00C5187D key

12