Searched refs:SCTLR (Results 1 – 25 of 31) sorted by relevance
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/external/arm-trusted-firmware/lib/psci/aarch32/ |
D | psci_helpers.S | 89 ldcopr r0, SCTLR 91 stcopr r0, SCTLR 109 ldcopr r1, SCTLR 111 stcopr r1, SCTLR
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/external/arm-trusted-firmware/lib/xlat_tables_v2/aarch32/ |
D | enable_mmu.S | 18 ldcopr r1, SCTLR 56 ldcopr r1, SCTLR 64 stcopr r1, SCTLR
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/external/arm-trusted-firmware/lib/cpus/aarch32/ |
D | aem_generic.S | 15 ldcopr r0, SCTLR 31 ldcopr r0, SCTLR
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D | cortex_a32.S | 56 ldcopr r0, SCTLR 87 ldcopr r0, SCTLR
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D | cortex_a72.S | 146 ldcopr r0, SCTLR 193 ldcopr r0, SCTLR
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D | cortex_a53.S | 224 ldcopr r0, SCTLR 254 ldcopr r0, SCTLR
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D | cortex_a12.S | 15 ldcopr r0, SCTLR
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D | cortex_a5.S | 15 ldcopr r0, SCTLR
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D | cortex_a7.S | 15 ldcopr r0, SCTLR
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D | cortex_a9.S | 15 ldcopr r0, SCTLR
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D | cortex_a15.S | 21 ldcopr r0, SCTLR
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D | cortex_a17.S | 15 ldcopr r0, SCTLR
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D | cortex_a57.S | 487 ldcopr r0, SCTLR 529 ldcopr r0, SCTLR
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/external/arm-trusted-firmware/include/arch/aarch32/ |
D | el3_common_macros.S | 31 ldcopr r0, SCTLR 33 stcopr r0, SCTLR 237 stcopr r0, SCTLR
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/external/arm-trusted-firmware/bl2u/aarch32/ |
D | bl2u_entrypoint.S | 48 ldcopr r0, SCTLR 51 stcopr r0, SCTLR
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/external/arm-trusted-firmware/bl2/aarch32/ |
D | bl2_entrypoint.S | 49 ldcopr r0, SCTLR 52 stcopr r0, SCTLR
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/external/u-boot/arch/arm/cpu/armv7/sunxi/ |
D | fel_utils.S | 19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register 37 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register
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/external/u-boot/arch/arm/mach-uniphier/arm32/ |
D | lowlevel_init.S | 23 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) 42 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) 74 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
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D | psci_smp.S | 14 mrc p15, 0, r1, c1, c0, 0 @ SCTLR (System Control Register)
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/external/arm-trusted-firmware/bl1/aarch32/ |
D | bl1_exceptions.S | 122 ldcopr r9, SCTLR 124 stcopr r9, SCTLR
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/external/arm-trusted-firmware/lib/aarch32/ |
D | misc_helpers.S | 178 ldcopr r0, SCTLR 180 stcopr r0, SCTLR
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/external/u-boot/arch/arm/cpu/armv7/ |
D | start.S | 71 mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register 73 mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register
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D | psci.S | 265 mrc p15, 0, r0, c1, c0, 0 @ SCTLR 267 mcr p15, 0, r0, c1, c0, 0 @ SCTLR
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/external/OpenCSD/decoder/tests/snapshots/trace_cov_a15/ |
D | device1.ini | 157 SCTLR=0x00C5187D key
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/external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/ |
D | device1.ini | 157 SCTLR=0x00C5187D key
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