| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | sdwa-preserve.mir | 1 …fiji -start-before=si-peephole-sdwa -verify-machineinstrs -o - %s | FileCheck -check-prefix=SDWA %s
2 …x900 -start-before=si-peephole-sdwa -verify-machineinstrs -o - %s | FileCheck -check-prefix=SDWA %s
4 # SDWA-LABEL: {{^}}add_f16_u32_preserve
6 # SDWA: flat_load_dword [[FIRST:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]
7 # SDWA: flat_load_dword [[SECOND:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]
9 # SDWA: v_mul_f32_sdwa [[RES:v[0-9]+]], [[FIRST]], [[SECOND]] dst_sel:WORD_1 dst_unused:UNUSED_PAD …
10 # SDWA: v_add_f16_sdwa [[RES:v[0-9]+]], [[FIRST]], [[SECOND]] dst_sel:BYTE_1 dst_unused:UNUSED_PRES…
12 # SDWA: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], [[RES]]
59 # SDWA-LABEL: sdwa_preserve_keep
60 # SDWA: flat_load_dword [[FIRST:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]
[all …]
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| D | bfe-combine.ll | 2 ; RUN: llc -march=amdgcn -mcpu=fiji < %s | FileCheck --check-prefix=GCN --check-prefix=VI-SDWA %s
8 ; VI-SDWA: v_mov_b32_e32 v[[SHIFT:[0-9]+]], 2
9 ; VI-SDWA: v_lshlrev_b32_sdwa v[[ADDRBASE:[0-9]+]], v[[SHIFT]], v{{[0-9]+}} dst_sel:DWORD dst_unuse…
13 ; VI-SDWA: v_add_u32_e32 v[[ADDRLO:[0-9]+]], vcc, s{{[0-9]+}}, v[[ADDRBASE]]
29 ; VI-SDWA: v_mov_b32_e32 v[[SHIFT:[0-9]+]], 15
30 ; VI-SDWA: v_lshlrev_b32_sdwa v[[ADDRBASE1:[0-9]+]], v[[SHIFT]], v{{[0-9]+}} dst_sel:DWORD dst_unus…
31 ; VI-SDWA: v_lshlrev_b64 v{{\[}}[[ADDRBASE:[0-9]+]]:{{[^\]+}}], 2, v{{\[}}[[ADDRBASE1]]:{{[^\]+}}]
32 ; VI-SDWA: v_add_u32_e32 v[[ADDRLO:[0-9]+]], vcc, s{{[0-9]+}}, v[[ADDRBASE]]
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| D | immv216.ll | 123 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
144 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
165 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
186 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
208 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
229 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
250 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
271 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
292 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
352 ; FIXME: Shouldn't need right shift and SDWA, also extra copy
[all …]
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| D | sdwa-peephole.ll | 2 …6-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=VI,SDWA,GCN %s
3 …denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX9,SDWA,GCN %s
42 ; SDWA: v_mul_u32_u24_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PA…
57 ; SDWA: v_mul_lo_i32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
58 ; SDWA-NOT: v_mul_u32_u24_sdwa
157 ; SDWA: v_mul_f16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
158 ; SDWA-NOT: v_mul_f16_sdwa
251 ; SDWA: v_mul_lo_i32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
252 ; SDWA-NOT: v_mul_u32_u24_sdwa
349 ; SDWA-DAG: v_cvt_f32_i32_sdwa v{{[0-9]+}}, sext(v{{[0-9]+}}) dst_sel:DWORD dst_unused:UNUSED_PAD s…
[all …]
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| D | cttz_zero_undef.ll | 2 …strs < %s | FileCheck -enable-var-scope -check-prefix=SI -check-prefix=SI-SDWA -check-prefix=FUNC…
134 ; SI-SDWA: v_ffbl_b32_sdwa
147 ; SI-SDWA: v_ffbl_b32_sdwa
175 ; SI-SDWA: v_or_b32_sdwa
177 ; SI-SDWA: v_or_b32_sdwa
243 ; SI-SDWA: v_ffbl_b32_sdwa
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | VOPInstructions.td | 308 def SDWA {
346 // GFX9 adds two features to SDWA:
347 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.
351 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
357 // In GFX9, V_MAC_F16, V_MAC_F32 opcodes cannot be used with SDWA
359 // gfx9 SDWA basic encoding
379 // gfx9 SDWA-A
392 // gfx9 SDWA-B
420 let SDWA = 1;
425 let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
[all …]
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| D | AMDGPU.td | 200 "Support SDWA (Sub-DWORD Addressing) extension"
206 "Support OMod with SDWA (Sub-DWORD Addressing) extension"
212 "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
218 "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
224 "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
230 "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
578 string SDWA = "SDWA";
600 let Name = AMDGPUAsmVariants.SDWA;
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| D | SIPeepholeSDWA.cpp | 136 using namespace AMDGPU::SDWA;
396 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
403 if (DstSel == AMDGPU::SDWA::SdwaSel::WORD_1 && in convertToSDWA()
404 getSrcSel() == AMDGPU::SDWA::SdwaSel::WORD_0) { in convertToSDWA()
464 getDstSel() != AMDGPU::SDWA::DWORD) { in convertToSDWA()
998 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1008 SDWAInst.addImm(AMDGPU::SDWA::DstUnused::UNUSED_PAD); in convertToSDWA()
1018 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1028 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1035 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
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| D | SIDefines.h | 42 SDWA = 1 << 14, enumerator
194 SDWA = 2, enumerator
355 namespace SDWA {
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| D | SIInstrInfo.td | 31 int SDWA = 2;
1097 // instructions with SDWA extension
1233 // Return type of input modifiers operand specified input operand for SDWA
1413 // Ins for SDWA
1457 // Outs for DPP and SDWA
1461 (outs), // no dst for VOPC, we use "vcc"-token as dst in SDWA VOPC instructions
1466 // Outs for SDWA
1626 // Function that checks if instruction supports DPP and SDWA
1630 0, // NumSrcArgs == 3 - No DPP or SDWA for VOP3
1632 0, // 64-bit dst - No DPP or SDWA for 64-bit operands
[all …]
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| D | SIInstrFormats.td | 45 field bit SDWA = 0;
141 let TSFlags{14} = SDWA;
191 …let hasExtraSrcRegAllocReq = !if(VOP1,1,!if(VOP2,1,!if(VOP3,1,!if(VOPC,1,!if(SDWA,1, !if(VALU,1,0)…
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| D | SIInstrInfo.h | 389 return MI.getDesc().TSFlags & SIInstrFlags::SDWA; in isSDWA()
393 return get(Opcode).TSFlags & SIInstrFlags::SDWA; in isSDWA()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 332 using namespace AMDGPU::SDWA; in getSDWASrcEncoding()
362 using namespace AMDGPU::SDWA; in getSDWAVopcDstEncoding()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIDefines.h | 32 SDWA = 1 << 14, enumerator
|
| D | VIInstrFormats.td | 230 let SDWA = 1;
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| D | SIInstrFormats.td | 35 field bits<1> SDWA = 0;
71 let TSFlags{14} = SDWA;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.cpp | 807 using namespace AMDGPU::SDWA; in decodeSDWASrc()
853 using namespace AMDGPU::SDWA; in decodeSDWAVopcDst()
|
| /external/mesa3d/src/amd/compiler/ |
| D | aco_ir.cpp | 228 …rmat format = (Format)(((uint16_t)tmp->format & ~(uint16_t)Format::VOP3) | (uint16_t)Format::SDWA); in convert_to_SDWA()
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| D | aco_opcodes.py | 60 SDWA = 1 << 14 variable in Format
158 if self == Format.SDWA:
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| D | aco_ir.h | 108 SDWA = 1 << 14, enumerator
243 return (Format) ((uint32_t) Format::SDWA | (uint32_t) format); in asSDWA()
955 return (uint16_t) format & (uint16_t) Format::SDWA; in isSDWA()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 380 else if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::SDWA) in printVOPDst()
701 using namespace llvm::AMDGPU::SDWA; in printSDWASel()
740 using namespace llvm::AMDGPU::SDWA; in printSDWADstUnused()
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| /external/mesa3d/docs/relnotes/ |
| D | 20.1.1.rst | 157 - aco: consider SDWA during value numbering
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2150 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) ) in checkTargetMatchPredicate()
2164 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) { in checkTargetMatchPredicate()
2194 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA, in getMatchedVariants()
2206 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, AMDGPUAsmVariants::DPP in getMatchedVariants()
2283 SIInstrFlags::SDWA)) { in validateConstantBusLimitations()
5290 using namespace llvm::AMDGPU::SDWA; in parseSDWASel()
5323 using namespace llvm::AMDGPU::SDWA; in parseSDWADstUnused()
5368 using namespace llvm::AMDGPU::SDWA; in cvtSDWA()
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUOperandSyntax.rst | 648 VOP1/VOP2/VOPC SDWA Modifiers
740 VOP1/VOP2/VOPC SDWA Operand Modifiers
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| /external/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 299 else if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::SDWA) in printVOPDst()
|