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Searched refs:SEV (Results 1 – 25 of 31) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/
Dinst-family-set-clr-flag.s19 ; SEV
/external/llvm/test/MC/ARM/
Darm11-hint-instr.s18 @ YIELD/WFE/WFI/SEV/CLREX - are not supported pre v6K
Dthumb-diagnostics.s238 @ SEV/WFE/WFI/YIELD - are not supported pre v6M or v6T2
Dbasic-arm-instructions.s2315 @ SEV
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Darm11-hint-instr.s18 @ YIELD/WFE/WFI/SEV/CLREX - are not supported pre v6K
Dthumb-diagnostics.s307 @ SEV/WFE/WFI/YIELD - are not supported pre v6M or v6T2
Dbasic-thumb2-instructions.s2229 @ SEV
Dbasic-arm-instructions.s2317 @ SEV
/external/libavc/decoder/
Dih264d_defs.h578 #define SEV 2 macro
/external/tensorflow/tensorflow/compiler/xla/
Dutil.h641 #define XLA_LOG_LINES(SEV, STRING) \ argument
642 ::xla::LogLines(SEV, STRING, __FILE__, __LINE__)
/external/clang/lib/StaticAnalyzer/Core/
DExprEngine.cpp2451 Optional<nonloc::SymbolVal> SEV = V.getAs<nonloc::SymbolVal>(); in evalEagerlyAssumeBinOpBifurcation() local
2452 if (SEV && SEV->isExpression()) { in evalEagerlyAssumeBinOpBifurcation()
2457 std::tie(StateTrue, StateFalse) = state->assume(*SEV); in evalEagerlyAssumeBinOpBifurcation()
/external/llvm/lib/Target/AArch64/
DAArch64SchedCyclone.td288 // NOP,SEV,SEVL,WFE,WFI,YIELD
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SchedCyclone.td290 // NOP,SEV,SEVL,WFE,WFI,YIELD
/external/v8/src/codegen/arm64/
Dconstants-arm64.h386 SEV = 4, enumerator
/external/vixl/src/aarch64/
Dconstants-aarch64.h311 SEV = 4, enumerator
Ddisasm-aarch64.cc2198 case SEV: in VisitSystem()
/external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/
Detmv3_0x12.txt998 Instruction 973 S:0xC003CC64 0xF3AF8004 1 SEV.W false
1377 Instruction 1344 S:0xC00359FE 0xF3AF8004 1 SEV.W false
1775 Instruction 1730 S:0xC0025BE4 0xF3AF8004 1 SEV.W false
Detmv3_0x10.txt456 Instruction 426 S:0xC0025E5E 0xF3AF8004 1 SEV.W false
1234 Instruction 1138 S:0xC002D9D4 0xF3AF8004 1 SEV.W false
1396 Instruction 1280 S:0xC002D9D4 0xF3AF8004 1 SEV.W false
2873 Instruction 2721 S:0xC003ACB2 0xF3AF8004 1 SEV.W false
3305 Instruction 3126 S:0xC00350FA 0xF3AF8004 1 SEV.W false
4445 Instruction 4243 S:0xC003CC64 0xF3AF8004 1 SEV.W false
4882 Instruction 4667 S:0xC00359FE 0xF3AF8004 1 SEV.W false
5270 Instruction 5044 S:0xC0025BA0 0xF3AF8004 1 SEV.W false
5510 Instruction 5273 S:0xC0025BE4 0xF3AF8004 1 SEV.W false
5951 Instruction 5678 S:0xC00465B6 0xF3AF8004 1 SEV.W false
Detmv3_0x11.txt127 Instruction 119 S:0xC0055628 0xF3AF8004 1 SEV.W false
2009 Instruction 1966 S:0xC003D588 0xF3AF8004 1 SEV.W false
2828 Instruction 2768 S:0xC003CC64 0xF3AF8004 1 SEV.W false
3215 Instruction 3147 S:0xC00359FE 0xF3AF8004 1 SEV.W false
3589 Instruction 3509 S:0xC0025BE4 0xF3AF8004 1 SEV.W false
4030 Instruction 3914 S:0xC00465B6 0xF3AF8004 1 SEV.W false
6011 Instruction 5822 S:0xC003ACB2 0xF3AF8004 1 SEV.W false
7461 Instruction 7224 S:0xC003ACB2 0xF3AF8004 1 SEV.W false
Dptmv1_0x13.txt45 Instruction 32 S:0xC0018DBC 0xF3AF8004 0 SEV.W false
2729 Instruction 2640 S:0xC003C0C0 0xF3AF8004 0 SEV.W false
3428 Instruction 3317 S:0xC003CA0E 0xF3AF8004 0 SEV.W false
4628 Instruction 4483 S:0xC002D9D4 0xF3AF8004 0 SEV.W false
5456 Instruction 5248 S:0xC002D6E6 0xF3AF8004 0 SEV.W false
6863 Instruction 6635 S:0xC003D588 0xF3AF8004 0 SEV.W false
6924 Instruction 6696 S:0xC002D74E 0xF3AF8004 0 SEV.W false
7105 Instruction 6869 S:0xC003D608 0xF3AF8004 0 SEV.W false
8180 Instruction 7899 S:0xC002E714 0xF3AF8004 0 SEV.W false
8825 Instruction 8528 S:0xC002EC9C 0xF3AF8004 0 SEV.W false
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1524 # SEV
Dthumb2.txt1677 # SEV
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1677 # SEV
Dbasic-arm-instructions.txt1524 # SEV
/external/vixl/test/aarch64/
Dtest-disasm-aarch64.cc2941 COMPARE(hint(SEV), "sev"); in TEST()

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