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/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimdintrin.h31 typedef SIMD256 SIMD; typedef
39 #define _simd_load_ps SIMD::load_ps
40 #define _simd_load1_ps SIMD::broadcast_ss
41 #define _simd_loadu_ps SIMD::loadu_ps
42 #define _simd_setzero_ps SIMD::setzero_ps
43 #define _simd_set1_ps SIMD::set1_ps
44 #define _simd_blend_ps(a, b, i) SIMD::blend_ps<i>(a, b)
45 #define _simd_blend_epi32(a, b, i) SIMD::blend_epi32<i>(a, b)
46 #define _simd_blendv_ps SIMD::blendv_ps
47 #define _simd_store_ps SIMD::store_ps
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/external/swiftshader/src/Pipeline/
DSpirvShaderImage.cpp56 sw::SIMD::Float sRGBtoLinear(sw::SIMD::Float c) in sRGBtoLinear()
58 sw::SIMD::Float lc = c * sw::SIMD::Float(1.0f / 12.92f); in sRGBtoLinear()
59 …sw::SIMD::Float ec = sw::power((c + sw::SIMD::Float(0.055f)) * sw::SIMD::Float(1.0f / 1.055f), sw:… in sRGBtoLinear()
61 sw::SIMD::Int linear = CmpLT(c, sw::SIMD::Float(0.04045f)); in sRGBtoLinear()
63 …return rr::As<sw::SIMD::Float>((linear & rr::As<sw::SIMD::Int>(lc)) | (~linear & rr::As<sw::SIMD::… in sRGBtoLinear()
207 Array<SIMD::Float> in(16); // Maximum 16 input parameter components. in EmitImageSample()
271 in[i] = As<SIMD::Float>(SIMD::Int(0)); in EmitImageSample()
284 in[i] = As<SIMD::Float>(offsetValue.Int(j)); // Integer values, but transfered as float. in EmitImageSample()
291 in[i] = As<SIMD::Float>(sampleValue.Int(0)); in EmitImageSample()
306 Array<SIMD::Float> out(4); in EmitImageSample()
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DSpirvShaderGLSLstd450.cpp115 …dst.move(i, x + ((SIMD::Float(CmpLT(x, src.Float(i)) & SIMD::Int(1)) * SIMD::Float(2.0f)) - SIMD::… in EmitExtGLSLstd450()
116 …SIMD::Float(CmpEQ(Frac(src.Float(i)), SIMD::Float(0.5f)) & SIMD::Int(1)) * SIMD::Float(Int4(x) & S… in EmitExtGLSLstd450()
186 dst.move(i, CmpNLT(x.Float(i), edge.Float(i)) & As<SIMD::Int>(SIMD::Float(1.0f))); in EmitExtGLSLstd450()
199 SIMD::Float(0.0f)), in EmitExtGLSLstd450()
200 SIMD::Float(1.0f)); in EmitExtGLSLstd450()
254 …auto neg = As<SIMD::Int>(CmpLT(src.Float(i), SIMD::Float(-0.0f))) & As<SIMD::Int>(SIMD::Float(-1.0… in EmitExtGLSLstd450()
255 …auto pos = As<SIMD::Int>(CmpNLE(src.Float(i), SIMD::Float(+0.0f))) & As<SIMD::Int>(SIMD::Float(1.0… in EmitExtGLSLstd450()
265 auto neg = CmpLT(src.Int(i), SIMD::Int(0)) & SIMD::Int(-1); in EmitExtGLSLstd450()
266 auto pos = CmpNLE(src.Int(i), SIMD::Int(0)) & SIMD::Int(1); in EmitExtGLSLstd450()
276 SIMD::Float d = Dot(type.sizeInComponents, I, N); in EmitExtGLSLstd450()
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DSpirvShaderGroup.cpp41 auto mask = As<SIMD::UInt>(state->activeLaneMask()); in BinaryOperation()
43 SIMD::UInt v_uint = (value.UInt(i) & mask) | (As<SIMD::UInt>(identity) & ~mask); in BinaryOperation()
81 …static_assert(SIMD::Width == 4, "EmitGroupNonUniform makes many assumptions that the SIMD vector w… in EmitGroupNonUniform()
96 SIMD::Int active = state->activeLaneMask(); in EmitGroupNonUniform()
99 auto v0111 = SIMD::Int(0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF); in EmitGroupNonUniform()
108 dst.move(0, AndAll(predicate.UInt(0) | ~As<SIMD::UInt>(state->activeLaneMask()))); in EmitGroupNonUniform()
115 dst.move(0, OrAll(predicate.UInt(0) & As<SIMD::UInt>(state->activeLaneMask()))); in EmitGroupNonUniform()
122 auto res = SIMD::UInt(0xffffffff); in EmitGroupNonUniform()
123 SIMD::UInt active = As<SIMD::UInt>(state->activeLaneMask()); in EmitGroupNonUniform()
124 SIMD::UInt inactive = ~active; in EmitGroupNonUniform()
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DShaderCore.hpp74 namespace SIMD { namespace
87 Pointer(rr::Pointer<Byte> base, rr::Int limit, SIMD::Int offset);
88 Pointer(rr::Pointer<Byte> base, unsigned int limit, SIMD::Int offset);
93 Pointer operator+(SIMD::Int i);
94 Pointer operator*(SIMD::Int i);
102 SIMD::Int offsets() const;
104 SIMD::Int isInBounds(unsigned int accessSize, OutOfBoundsBehavior robustness) const;
142 SIMD::Int dynamicOffsets; // If hasDynamicOffsets is false, all dynamicOffsets are zero.
143 std::array<int32_t, SIMD::Width> staticOffsets;
207 sw::SIMD::UInt halfToFloatBits(sw::SIMD::UInt halfBits);
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DShaderCore.cpp549 SIMD::UInt halfToFloatBits(SIMD::UInt halfBits) in halfToFloatBits()
551 auto magic = SIMD::UInt(126 << 23); in halfToFloatBits()
553 auto sign16 = halfBits & SIMD::UInt(0x8000); in halfToFloatBits()
554 auto man16 = halfBits & SIMD::UInt(0x03FF); in halfToFloatBits()
555 auto exp16 = halfBits & SIMD::UInt(0x7C00); in halfToFloatBits()
557 auto isDnormOrZero = CmpEQ(exp16, SIMD::UInt(0)); in halfToFloatBits()
558 auto isInfOrNaN = CmpEQ(exp16, SIMD::UInt(0x7C00)); in halfToFloatBits()
562 auto exp32 = (exp16 + SIMD::UInt(0x1C000)) << 13; in halfToFloatBits()
563 auto norm32 = (man32 | exp32) | (isInfOrNaN & SIMD::UInt(0x7F800000)); in halfToFloatBits()
565 auto denorm32 = As<SIMD::UInt>(As<SIMD::Float>(magic + man16) - As<SIMD::Float>(magic)); in halfToFloatBits()
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DComputeProgram.cpp71 …:BuiltInNumWorkgroups, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in setWorkgroupBuiltins()
75 As<SIMD::Float>(SIMD::Int(Extract(routine->numWorkgroups, component))); in setWorkgroupBuiltins()
79 …v::BuiltInWorkgroupId, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in setWorkgroupBuiltins()
83 As<SIMD::Float>(SIMD::Int(workgroupID[component])); in setWorkgroupBuiltins()
87 …:BuiltInWorkgroupSize, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in setWorkgroupBuiltins()
91 As<SIMD::Float>(SIMD::Int(Extract(routine->workgroupSize, component))); in setWorkgroupBuiltins()
95 …::BuiltInNumSubgroups, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in setWorkgroupBuiltins()
97 value[builtin.FirstComponent] = As<SIMD::Float>(SIMD::Int(routine->subgroupsPerWorkgroup)); in setWorkgroupBuiltins()
100 …::BuiltInSubgroupSize, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in setWorkgroupBuiltins()
102 value[builtin.FirstComponent] = As<SIMD::Float>(SIMD::Int(routine->invocationsPerSubgroup)); in setWorkgroupBuiltins()
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DSpirvShaderArithmetic.cpp48 SIMD::Float v = lhs.Float(i) * rhs.Float(0); in EmitMatrixTimesVector()
69 SIMD::Float v = lhs.Float(0) * rhs.Float(i * lhsType.sizeInComponents); in EmitVectorTimesMatrix()
95 SIMD::Float v = SIMD::Float(0); in EmitMatrixTimesMatrix()
175 auto one = SIMD::UInt(1); in EmitUnaryOp()
186 auto one = SIMD::UInt(1); in EmitUnaryOp()
188 SIMD::UInt out = (v >> offset) & Bitmask32(count); in EmitUnaryOp()
204 SIMD::UInt v = src.UInt(i); in EmitUnaryOp()
205 v = ((v >> 1) & SIMD::UInt(0x55555555)) | ((v & SIMD::UInt(0x55555555)) << 1); in EmitUnaryOp()
206 v = ((v >> 2) & SIMD::UInt(0x33333333)) | ((v & SIMD::UInt(0x33333333)) << 2); in EmitUnaryOp()
207 v = ((v >> 4) & SIMD::UInt(0x0F0F0F0F)) | ((v & SIMD::UInt(0x0F0F0F0F)) << 4); in EmitUnaryOp()
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DVertexProgram.cpp42 …spv::BuiltInViewIndex, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in VertexProgram()
44 value[builtin.FirstComponent] = As<SIMD::Float>(SIMD::Int(routine.viewID)); in VertexProgram()
47 …:BuiltInInstanceIndex, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in VertexProgram()
50 value[builtin.FirstComponent] = As<SIMD::Float>(SIMD::Int(routine.instanceID)); in VertexProgram()
53 …::BuiltInSubgroupSize, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in VertexProgram()
55 value[builtin.FirstComponent] = As<SIMD::Float>(SIMD::Int(SIMD::Width)); in VertexProgram()
70 routine.vertexIndex = *Pointer<SIMD::Int>(As<Pointer<SIMD::Int>>(batch)) + in program()
71 SIMD::Int(*Pointer<Int>(data + OFFSET(DrawData, baseVertex))); in program()
78 As<SIMD::Float>(routine.vertexIndex); in program()
81 auto activeLaneMask = SIMD::Int(0xFFFFFFFF); in program()
DPixelProgram.cpp65 routine.fragCoord[0] = SIMD::Float(Float(x)) + SIMD::Float(0.5f, 1.5f, 0.5f, 1.5f); in setBuiltins()
66 routine.fragCoord[1] = SIMD::Float(Float(y)) + SIMD::Float(0.5f, 0.5f, 1.5f, 1.5f); in setBuiltins()
69 routine.pointCoord[0] = SIMD::Float(0.5f) + in setBuiltins()
70 … SIMD::Float(Float(x) - (*Pointer<Float>(primitive + OFFSET(Primitive, pointCoordX)))); in setBuiltins()
71 routine.pointCoord[1] = SIMD::Float(0.5f) + in setBuiltins()
72 … SIMD::Float(Float(y) - (*Pointer<Float>(primitive + OFFSET(Primitive, pointCoordY)))); in setBuiltins()
73 routine.invocationsPerSubgroup = SIMD::Width; in setBuiltins()
75 routine.windowSpacePosition[0] = x + SIMD::Int(0, 1, 0, 1); in setBuiltins()
76 routine.windowSpacePosition[1] = y + SIMD::Int(0, 0, 1, 1); in setBuiltins()
79 …spv::BuiltInViewIndex, [&](const SpirvShader::BuiltinMapping &builtin, Array<SIMD::Float> &value) { in setBuiltins()
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DSpirvShader.hpp84 void move(uint32_t i, RValue<SIMD::Float> &&scalar) { emplace(i, scalar.value); } in move()
85 void move(uint32_t i, RValue<SIMD::Int> &&scalar) { emplace(i, scalar.value); } in move()
86 void move(uint32_t i, RValue<SIMD::UInt> &&scalar) { emplace(i, scalar.value); } in move()
88 void move(uint32_t i, const RValue<SIMD::Float> &scalar) { emplace(i, scalar.value); } in move()
89 void move(uint32_t i, const RValue<SIMD::Int> &scalar) { emplace(i, scalar.value); } in move()
90 void move(uint32_t i, const RValue<SIMD::UInt> &scalar) { emplace(i, scalar.value); } in move()
93 RValue<SIMD::Float> Float(uint32_t i) const in Float()
97 return As<SIMD::Float>(scalar[i]); // TODO(b/128539387): RValue<SIMD::Float>(scalar) in Float()
100 RValue<SIMD::Int> Int(uint32_t i) const in Int()
104 return As<SIMD::Int>(scalar[i]); // TODO(b/128539387): RValue<SIMD::Int>(scalar) in Int()
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DSpirvShaderSampling.cpp104 …rr::Function<Void(Pointer<Byte>, Pointer<Byte>, Pointer<SIMD::Float>, Pointer<SIMD::Float>, Pointe… in emitSamplerRoutine()
108 Pointer<SIMD::Float> in = function.Arg<2>(); in emitSamplerRoutine()
109 Pointer<SIMD::Float> out = function.Arg<3>(); in emitSamplerRoutine()
112 SIMD::Float uvw[4] = { 0, 0, 0, 0 }; in emitSamplerRoutine()
113 SIMD::Float q = 0; in emitSamplerRoutine()
114 …SIMD::Float lodOrBias = 0; // Explicit level-of-detail, or bias added to the implicit level-of-de… in emitSamplerRoutine()
118 SIMD::Int sampleId = 0; in emitSamplerRoutine()
137 uvw[1] = SIMD::Float(0); in emitSamplerRoutine()
141 uvw[1] = SIMD::Float(0); in emitSamplerRoutine()
170 sampleId = As<SIMD::Int>(in[i]); in emitSamplerRoutine()
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DSpirvShader.cpp1084 SIMD::Pointer SpirvShader::WalkExplicitLayoutAccessChain(Object::ID baseId, uint32_t numIndexes, ui… in WalkExplicitLayoutAccessChain()
1140 ptr += SIMD::Int(d.ArrayStride) * state->getIntermediate(indexIds[i]).Int(0); in WalkExplicitLayoutAccessChain()
1158 ptr += SIMD::Int(columnStride) * state->getIntermediate(indexIds[i]).Int(0); in WalkExplicitLayoutAccessChain()
1173 ptr += SIMD::Int(elemStride) * state->getIntermediate(indexIds[i]).Int(0); in WalkExplicitLayoutAccessChain()
1187 SIMD::Pointer SpirvShader::WalkAccessChain(Object::ID baseId, uint32_t numIndexes, uint32_t const *… in WalkAccessChain()
1249 ptr += SIMD::Int(stride) * state->getIntermediate(indexIds[i]).Int(0); in WalkAccessChain()
1565 void SpirvShader::emit(SpirvRoutine *routine, RValue<SIMD::Int> const &activeLaneMask, RValue<SIMD:… in emit()
2096 dst.move(i, RValue<SIMD::Float>(0.0f)); in EmitVectorShuffle()
2120 SIMD::UInt v = SIMD::UInt(0); in EmitVectorExtractDynamic()
2124 v |= CmpEQ(index.UInt(0), SIMD::UInt(i)) & src.UInt(i); in EmitVectorExtractDynamic()
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DSpirvShaderMemory.cpp63 dst.move(el.index, p.Load<SIMD::Float>(robustness, state->activeLaneMask(), atomic, memoryOrder)); in EmitLoad()
93 SIMD::Int mask = state->activeLaneMask(); in EmitStore()
106 p.Store(SIMD::Int(src[el.index]), robustness, mask, atomic, memoryOrder); in EmitStore()
139 auto size = elementTy.sizeInComponents * static_cast<uint32_t>(sizeof(float)) * SIMD::Width; in EmitVariable()
140 state->createPointer(resultId, SIMD::Pointer(base, size)); in EmitVariable()
148 state->createPointer(resultId, SIMD::Pointer(base, size, workgroupMemory.offsetOf(resultId))); in EmitVariable()
166 auto size = elementTy.sizeInComponents * static_cast<uint32_t>(sizeof(float)) * SIMD::Width; in EmitVariable()
167 state->createPointer(resultId, SIMD::Pointer(base, size)); in EmitVariable()
184 state->createPointer(resultId, SIMD::Pointer(binding, size)); in EmitVariable()
205 state->createPointer(resultId, SIMD::Pointer(routine->descriptorSets[d.DescriptorSet], size)); in EmitVariable()
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DSpirvShaderControlFlow.cpp194 void SpirvShader::EmitState::addOutputActiveLaneMaskEdge(Block::ID to, RValue<SIMD::Int> mask) in addOutputActiveLaneMaskEdge()
199 void SpirvShader::EmitState::addActiveLaneMaskEdge(Block::ID from, Block::ID to, RValue<SIMD::Int> … in addActiveLaneMaskEdge()
215 RValue<SIMD::Int> SpirvShader::GetActiveLaneMaskEdge(EmitState *state, Block::ID from, Block::ID to… in GetActiveLaneMaskEdge()
297 SIMD::Int activeLaneMask(0); in EmitNonLoop()
357 SIMD::Int loopActiveLaneMask = SIMD::Int(0); in EmitLoop()
365 std::unordered_map<Block::ID, SIMD::Int> mergeActiveLaneMasks; in EmitLoop()
368 mergeActiveLaneMasks.emplace(in, SIMD::Int(0)); in EmitLoop()
406 loopActiveLaneMask = SIMD::Int(0); in EmitLoop()
524 SIMD::Int defaultLaneMask = state->activeLaneMask(); in EmitSwitch()
527 std::vector<RValue<SIMD::Int>> caseLabelMatches; in EmitSwitch()
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/external/fec/
DREADME37 SIMD SUPPORT
39 This package automatically makes use of various SIMD (Single
48 Many of the SIMD versions run more than an order of
49 magnitude faster than their portable C versions. The available SIMD
51 version of each routine is automatically selected. If no SIMD
56 The SIMD-assisted versions generally produce the same results as the C
59 path metrics. On the other hand, the SIMD versions use the
67 AMD CPUs starting with the K6. SSE (SIMD Streaming Extensions) was
73 The latest IA-32 SIMD instruction set, SSE3 (also known as "Prescott
98 Add SIMD version override options
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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td1 // WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
11 /// \brief WebAssembly SIMD operand code-gen constructs.
15 // TODO: Implement SIMD instructions.
/external/psimd/
DREADME.md1 # P(ortable) SIMD
2 Portable 128-bit SIMD intrinsics
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/
Dfrontend.cpp1115 simdscalari vViewportIdx = SIMD::setzero_si(); in GeometryShaderStage()
1116 simdscalari vRtIdx = SIMD::setzero_si(); in GeometryShaderStage()
1117 SIMD::Vec4 svgAttrib[4]; in GeometryShaderStage()
1128 SIMD::castps_si(svgAttrib[0][VERTEX_SGV_VAI_COMP]); in GeometryShaderStage()
1132 SIMD::max_epi32(vViewportIdx, SIMD::setzero_si()); in GeometryShaderStage()
1134 SIMD::set1_epi32(KNOB_NUM_VIEWPORTS_SCISSORS); in GeometryShaderStage()
1136 SIMD::cmplt_epi32(vViewportIdx, vNumViewports); in GeometryShaderStage()
1137 vViewportIdx = SIMD::and_si(vClearMask, vViewportIdx); in GeometryShaderStage()
1142 vRtIdx = SIMD::castps_si(svgAttrib[0][VERTEX_SGV_RTAI_COMP]); in GeometryShaderStage()
1595 simdscalari vViewportIdx = SIMD::setzero_si(); in TessellationStages()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td1 // WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
11 /// WebAssembly SIMD operand code-gen constructs.
/external/libjpeg-turbo/release/
Ddeb-control.in10 Description: A SIMD-accelerated JPEG codec that provides both the libjpeg and TurboJPEG APIs
11 libjpeg-turbo is a JPEG image codec that uses SIMD instructions (MMX, SSE2,
27 libjpeg-turbo was originally based on libjpeg/SIMD, an MMX-accelerated
/external/libjpeg-turbo/simd/x86_64/
Djsimdcpu.asm2 ; jsimdcpu.asm - SIMD instruction support check
8 ; x86 SIMD extension for IJG JPEG library
26 ; Check if the CPU supports SIMD instructions
/external/libjpeg-turbo/simd/nasm/
Djsimdcfg.inc.h67 ; On this SIMD implementation, this must be 'unsigned char'.
76 ; On this SIMD implementation, this must be 'short'.
82 ; On this SIMD implementation, this must be 'unsigned int'.
/external/libjpeg-turbo/
DChangeLog.md10 2. Fixed a regression in the SIMD feature detection code, introduced by
11 the AVX2 SIMD extensions (2.0 beta1[1]), that was known to cause an illegal
75 8. Fixed a severe performance issue in the Loongson MMI SIMD extensions that
91 functions in the MIPS DSPr2 SIMD extensions are now disabled at compile time
95 3. Fixed a regression in the SIMD feature detection code, introduced by
96 the AVX2 SIMD extensions (2.0 beta1[1]), that caused libjpeg-turbo to crash on
155 7. The new CMake-based build system will now disable the MIPS DSPr2 SIMD
175 1. Added AVX2 SIMD implementations of the colorspace conversion, chroma
280 12. The SIMD function symbols for x86[-64]/ELF, MIPS/ELF, macOS/x86[-64] (if
285 13. Added Loongson MMI SIMD implementations of the RGB-to-YCbCr and
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/external/skqp/third_party/libjpeg-turbo/
Djsimdcfg.inc42 ; On this SIMD implementation, this must be 'unsigned char'.
48 ; On this SIMD implementation, this must be 'short'.
53 ; On this SIMD implementation, this must be 'unsigned int'.

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