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Searched refs:SINT (Results 1 – 24 of 24) sorted by relevance

/external/skia/include/private/
DSkVx.h62 #define SINT template <int N, typename T> static inline macro
151 SINT Vec<2*N,T> join(const Vec<N,T>& lo, const Vec<N,T>& hi) {
185 SINT VExt<N,T> to_vext(const Vec<N,T>& v) { return bit_pun<VExt<N,T>>(v); }
186 SINT Vec <N,T> to_vec(const VExt<N,T>& v) { return bit_pun<Vec <N,T>>(v); }
188 …SINT Vec<N,T> operator+(const Vec<N,T>& x, const Vec<N,T>& y) { return to_vec<N,T>(to_vext(x) + to…
189 …SINT Vec<N,T> operator-(const Vec<N,T>& x, const Vec<N,T>& y) { return to_vec<N,T>(to_vext(x) - to…
190 …SINT Vec<N,T> operator*(const Vec<N,T>& x, const Vec<N,T>& y) { return to_vec<N,T>(to_vext(x) * to…
191 …SINT Vec<N,T> operator/(const Vec<N,T>& x, const Vec<N,T>& y) { return to_vec<N,T>(to_vext(x) / to…
193 …SINT Vec<N,T> operator^(const Vec<N,T>& x, const Vec<N,T>& y) { return to_vec<N,T>(to_vext(x) ^ to…
194 …SINT Vec<N,T> operator&(const Vec<N,T>& x, const Vec<N,T>& y) { return to_vec<N,T>(to_vext(x) & to…
[all …]
/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_formats.c169 I3(A, L8_SINT, R8_SINT, R, R, R, xx, SINT, R8, TR),
174 I3(A, L16_SINT, R16_SINT, R, R, R, xx, SINT, R16, TR),
177 I3(A, L32_SINT, R32_SINT, R, R, R, xx, SINT, R32, TR),
182 C4(A, I8_SINT, R8_SINT, R, R, R, R, SINT, R8, TR),
187 C4(A, I16_SINT, R16_SINT, R, R, R, R, SINT, R16, TR),
190 C4(A, I32_SINT, R32_SINT, R, R, R, R, SINT, R32, TR),
195 A1(A, A8_SINT, R8_SINT, xx, xx, xx, R, SINT, R8, T),
200 A1(A, A16_SINT, R16_SINT, xx, xx, xx, R, SINT, R16, T),
203 A1(A, A32_SINT, R32_SINT, xx, xx, xx, R, SINT, R32, T),
210 C4(A, L8A8_SINT, RG8_SINT, R, R, R, G, SINT, G8R8, T),
[all …]
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir.cpp997 { "RGBA32I", 4, { 32, 32, 32, 32 }, SINT },
998 { "RGBA16I", 4, { 16, 16, 16, 16 }, SINT },
999 { "RGBA8I", 4, { 8, 8, 8, 8 }, SINT },
1000 { "RG32I", 2, { 32, 32, 0, 0 }, SINT },
1001 { "RG16I", 2, { 16, 16, 0, 0 }, SINT },
1002 { "RG8I", 2, { 8, 8, 0, 0 }, SINT },
1003 { "R32I", 1, { 32, 0, 0, 0 }, SINT },
1004 { "R16I", 1, { 16, 0, 0, 0 }, SINT },
1005 { "R8I", 1, { 8, 0, 0, 0 }, SINT },
Dnv50_ir.h479 SINT, enumerator
Dnv50_ir_lowering_nvc0.cpp2202 case SINT: in getSrcType()
2218 case SINT: in getDestType()
/external/mesa3d/docs/gallium/
Dformat.rst20 - ``SINT``: N bit signed integer [-2^(N-1) ... 2^(N-1) - 1]
30 The difference between ``SINT`` and ``SSCALED`` is that the former are pure
Dtgsi.rst3580 level) out of UNORM, SNORM, SINT, UINT and FLOAT.
/external/ethtool/
Damd8111e.c94 SINT = (1 << 12), enumerator
/external/mesa3d/docs/relnotes/
D10.2.4.rst82 - i965: Drop SINT workaround for CMS layout on Broadwell.
D18.0.4.rst46 - radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.
D18.1.1.rst45 - radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.
D10.2.5.rst117 - i965: Drop SINT workaround for CMS layout on Broadwell.
D17.0.1.rst172 - radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
D13.0.6.rst235 - radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
D20.3.0.rst3881 - iris: Fix SINT assert in convert_fast_clear_color
4134 - amd/common: add PIPE_FORMAT_R64_{UINT,SINT} to GFX10 format table
D19.0.0.rst1800 - gallium: add SINT formats to have exact counterparts to SNORM formats
/external/angle/src/tests/deqp_support/
Ddeqp_khr_gles3_test_expectations.txt38 // CopyTexImage conversion failing due to Vulkan validation error re: UINT/SINT-descriptor-set issu…
/external/angle/src/libANGLE/renderer/d3d/d3d11/shaders/
DClear11.hlsl10 // - UINT & SINT clears can only be compiled with FL10+
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp6665 SDValue SINT = Op.getOperand(0); in LowerINT_TO_FP() local
6687 SINT, DAG.getConstant(2047, dl, MVT::i64)); in LowerINT_TO_FP()
6690 Round = DAG.getNode(ISD::OR, dl, MVT::i64, Round, SINT); in LowerINT_TO_FP()
6703 SINT, DAG.getConstant(53, dl, MVT::i32)); in LowerINT_TO_FP()
6709 SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT); in LowerINT_TO_FP()
6716 if (canReuseLoadAddress(SINT, MVT::i64, RLI, DAG)) { in LowerINT_TO_FP()
6722 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::SEXTLOAD)) { in LowerINT_TO_FP()
6732 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::ZEXTLOAD)) { in LowerINT_TO_FP()
6742 SINT.getOpcode() == ISD::SIGN_EXTEND) || in LowerINT_TO_FP()
6744 SINT.getOpcode() == ISD::ZERO_EXTEND)) && in LowerINT_TO_FP()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp7290 SDValue SINT = Op.getOperand(0); in LowerINT_TO_FP() local
7312 SINT, DAG.getConstant(2047, dl, MVT::i64)); in LowerINT_TO_FP()
7315 Round = DAG.getNode(ISD::OR, dl, MVT::i64, Round, SINT); in LowerINT_TO_FP()
7328 SINT, DAG.getConstant(53, dl, MVT::i32)); in LowerINT_TO_FP()
7334 SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT); in LowerINT_TO_FP()
7341 if (canReuseLoadAddress(SINT, MVT::i64, RLI, DAG)) { in LowerINT_TO_FP()
7346 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::SEXTLOAD)) { in LowerINT_TO_FP()
7356 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::ZEXTLOAD)) { in LowerINT_TO_FP()
7366 SINT.getOpcode() == ISD::SIGN_EXTEND) || in LowerINT_TO_FP()
7368 SINT.getOpcode() == ISD::ZERO_EXTEND)) && in LowerINT_TO_FP()
[all …]
/external/mesa3d/src/freedreno/.gitlab-ci/reference/
Dglxgears-a420.log56 RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
58 RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
530 RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
532 RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
534 RB_BLEND_BLUE: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
536 RB_BLEND_ALPHA: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
691 + 00000000 RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
693 + 00000000 RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
695 + 00000000 RB_BLEND_BLUE: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
697 + 00000000 RB_BLEND_ALPHA: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_vbo.c190 mode = VTX_ATTR(a, 4, SINT, 32); in nvc0_set_constant_vertex_attrib()
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart3.csv8047 ,"SX",,".SINT MAARTEN (DUTCH PART)",,,"",,,,,
D2013-1_UNLOCODE_CodeListPart1.csv6044 ,"BQ",,".BONAIRE, SINT EUSTATIUS AND SABA",,,"",,,,,