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Searched refs:SSCG_PLL_DIV5_CLKE_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-imx/imx8m/
Dclock_imx8mq.c169 pll_clke = SSCG_PLL_DIV5_CLKE_MASK; in decode_sscg_pll()
716 SSCG_PLL_DIV5_CLKE_MASK | SSCG_PLL_DIV6_CLKE_MASK | in sscg_pll_init()
731 SSCG_PLL_DIV5_CLKE_MASK | SSCG_PLL_DIV6_CLKE_MASK | in sscg_pll_init()
801 SSCG_PLL_DIV4_CLKE_MASK | SSCG_PLL_DIV5_CLKE_MASK | in clock_init()
807 SSCG_PLL_DIV4_CLKE_MASK | SSCG_PLL_DIV5_CLKE_MASK | in clock_init()
/external/u-boot/arch/arm/include/asm/arch-imx8m/
Dclock_imx8mq.h342 #define SSCG_PLL_DIV5_CLKE_MASK BIT(17) macro