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Searched refs:SSCG_PLL_REFCLK_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-imx8m/
Dclock_imx8mq.h355 #define SSCG_PLL_REFCLK_SEL_MASK 0x3 macro
/external/u-boot/arch/arm/mach-imx/imx8m/
Dclock_imx8mq.c208 pll_refclk_sel = pll_cfg0 & SSCG_PLL_REFCLK_SEL_MASK; in decode_sscg_pll()