/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUAsmPrinter.cpp | 117 const AMDGPUSubtarget &STM = MF->getSubtarget<AMDGPUSubtarget>(); in EmitFunctionBodyStart() local 119 if (STM.isAmdHsaOS()) { in EmitFunctionBodyStart() 127 const AMDGPUSubtarget &STM = MF->getSubtarget<AMDGPUSubtarget>(); in EmitFunctionEntryLabel() local 128 if (MFI->isKernel() && STM.isAmdHsaOS()) { in EmitFunctionEntryLabel() 159 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); in runOnMachineFunction() local 161 if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { in runOnMachineFunction() 163 if (!STM.isAmdHsaOS()) { in runOnMachineFunction() 181 if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { in runOnMachineFunction() 233 if (STM.dumpCode()) { in runOnMachineFunction() 253 const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>(); in EmitProgramInfoR600() local [all …]
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D | SILoadStoreOptimizer.cpp | 414 const SISubtarget &STM = MF.getSubtarget<SISubtarget>(); in runOnMachineFunction() local 415 if (!STM.loadStoreOptEnabled()) in runOnMachineFunction() 418 TII = STM.getInstrInfo(); in runOnMachineFunction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUAsmPrinter.cpp | 200 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in EmitFunctionBodyStart() local 202 if (STM.isAmdCodeObjectV2(F) && in EmitFunctionBodyStart() 261 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in EmitFunctionEntryLabel() local 262 if (MFI->isEntryFunction() && STM.isAmdCodeObjectV2(MF->getFunction())) { in EmitFunctionEntryLabel() 405 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local 408 if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) { in runOnMachineFunction() 424 if (STM.isAmdPalOS()) in runOnMachineFunction() 426 else if (!STM.isAmdHsaOS()) { in runOnMachineFunction() 511 if (STM.dumpCode()) { in runOnMachineFunction() 532 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getFunctionCodeSize() local [all …]
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D | R600AsmPrinter.cpp | 48 const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>(); in EmitProgramInfoR600() local 49 const R600RegisterInfo *RI = STM.getRegisterInfo(); in EmitProgramInfoR600() 72 if (STM.getGeneration() >= AMDGPUSubtarget::EVERGREEN) { in EmitProgramInfoR600()
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D | AMDGPUHSAMetadataStreamer.cpp | 206 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSACodeProps() local 215 HSACodeProps.mKernargSegmentSize = STM.getKernArgSegmentSize(F, in getHSACodeProps() 220 HSACodeProps.mWavefrontSize = STM.getWavefrontSize(); in getHSACodeProps() 225 HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled(); in getHSACodeProps() 235 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSADebugProps() local 238 if (!STM.debuggerSupported()) in getHSADebugProps() 244 if (STM.debuggerEmitPrologue()) { in getHSADebugProps()
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D | SILoadStoreOptimizer.cpp | 106 const GCNSubtarget *STM = nullptr; member in __anonc1bb0e040111::SILoadStoreOptimizer 466 if (STM->ldsRequiresM0Init()) in read2Opcode() 472 if (STM->ldsRequiresM0Init()) in read2ST64Opcode() 562 if (STM->ldsRequiresM0Init()) in write2Opcode() 568 if (STM->ldsRequiresM0Init()) in write2ST64Opcode() 880 CI.EltSize = AMDGPU::getSMRDEncodedOffset(*STM, 4); in optimizeBlock() 942 STM = &MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() 943 if (!STM->loadStoreOptEnabled()) in runOnMachineFunction() 946 TII = STM->getInstrInfo(); in runOnMachineFunction()
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/external/u-boot/arch/arm/mach-integrator/ |
D | Kconfig | 33 bool "Core Module for ARM926EJ-STM" 37 bool "Core Module for ARM946E-STM" 41 bool "Core Module for ARM1136JF-STM"
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/external/u-boot/board/armltd/integrator/ |
D | README | 73 ap926ejs_config Integrator Core Module for ARM926EJ-STM 74 ap946es_config Integrator Core Module for ARM946E-STM 76 cp926ejs_config Integrator Core Module for ARM926EJ-STM 77 cp946es_config Integrator Core Module for ARM946E-STM
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/ |
D | stm-scavenging.ll | 4 ; Use STM to save the three registers 22 ; Don't use STM: there is no available register to store
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/external/OpenCSD/decoder/tests/snapshots/stm_only-juno/ |
D | device_0.ini | 4 type=STM
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/external/OpenCSD/decoder/tests/snapshots/stm_only-2/ |
D | device_0.ini | 4 type=STM
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/external/OpenCSD/decoder/tests/snapshots/stm_only/ |
D | device_0.ini | 4 type=STM
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/external/OpenCSD/decoder/tests/snapshots/juno_r1_1/ |
D | device_12.ini | 4 type=STM
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/external/arm-trusted-firmware/docs/plat/marvell/misc/ |
D | mvebu-a8k-addr-map.rst | 25 …| - | | +--------- AP STM |…
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D | mvebu-io-win.rst | 13 - **0x1** = STM (Serial Trace Macro-cell, a programmer's port into trace stream)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | cortex-a57-misched-stm.ll | 6 ; We need second, post-ra scheduling to have STM instruction combined from single-stores
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D | cortex-a57-misched-stm-wrback.ll | 6 ; We need second, post-ra scheduling to have STM instruction combined from single-stores
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D | load-store-flags.ll | 26 ; past it to form the STM.
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/external/python/cryptography/vectors/cryptography_vectors/hashes/SHA1/ |
D | Readme.txt | 17 http://csrc.nist.gov/groups/STM/cavp/documents/shs/SHAVS.pdf.
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/external/python/cryptography/vectors/cryptography_vectors/hashes/SHA2/ |
D | Readme.txt | 17 http://csrc.nist.gov/groups/STM/cavp/documents/shs/SHAVS.pdf.
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/external/OpenCSD/ |
D | TODO | 9 systems with STM, unless a companion M class was present.
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D | README.md | 38 - STM (v1.1) software trace - packet processing and packet decode. 48 Note: for ITM and STM, packet decode is combining Master+Channel+Marker+Payload packets into a sing… 115 …es - fix to PTM decoder, ID checking on test program, adds NULL_TS support in STM packet processor. 117 - _Version 0.5.0_: Library Development - external decoder support. STM full decode.
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/external/OpenCSD/decoder/docs/ |
D | test_progs.md | 110 *Juno - ETB_1 selected for STM packet output, raw packet output* 121 Trace Packet Lister : STM Protocol on Trace ID 0x20 208 - `-stm` : Test the STM decoder - uses juno STM only snapshot.
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/external/llvm/test/CodeGen/ARM/ |
D | load-store-flags.ll | 26 ; past it to form the STM.
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/external/llvm/utils/TableGen/ |
D | DAGISelMatcherEmitter.cpp | 761 } else if (const SwitchTypeMatcher *STM = dyn_cast<SwitchTypeMatcher>(M)) { in BuildHistogram() local 762 for (unsigned i = 0, e = STM->getNumCases(); i != e; ++i) in BuildHistogram() 763 BuildHistogram(STM->getCaseMatcher(i), OpcodeFreq); in BuildHistogram()
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