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Searched refs:SUNXI_DRAM_CTL1_BASE (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dcpu_sun9i.h46 #define SUNXI_DRAM_CTL1_BASE (REGS_AHB0_BASE + 0x64000) macro
Dcpu_sun4i.h157 #define SUNXI_DRAM_CTL1_BASE 0x01c64000 macro
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun9i.c286 mctl_ctl_sched_init(SUNXI_DRAM_CTL1_BASE); in mctl_sys_init()
455 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL1_BASE; in mctl_channel_init()
Ddram_sun6i.c113 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL1_BASE; in mctl_channel_init()