| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 100 static void dumpSUList(ScheduleDAGInstrs::SUList &L) { in dumpSUList()
112 ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf, in ScheduleDAGInstrs() function in ScheduleDAGInstrs
178 void ScheduleDAGInstrs::startBlock(MachineBasicBlock *bb) { in startBlock()
182 void ScheduleDAGInstrs::finishBlock() { in finishBlock()
187 void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, in enterRegion()
197 void ScheduleDAGInstrs::exitRegion() { in exitRegion()
201 void ScheduleDAGInstrs::addSchedBarrierDeps() { in addSchedBarrierDeps()
230 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps()
273 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps()
350 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
[all …]
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| D | PostRASchedulerList.cpp | 114 class SchedulePostRATDList : public ScheduleDAGInstrs {
211 : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) { in SchedulePostRATDList()
240 ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs); in enterRegion()
251 ScheduleDAGInstrs::exitRegion(); in exitRegion()
381 ScheduleDAGInstrs::startBlock(BB); in startBlock()
443 ScheduleDAGInstrs::finishBlock(); in finishBlock()
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| D | MachineScheduler.cpp | 156 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
171 ScheduleDAGInstrs *createMachineScheduler();
186 ScheduleDAGInstrs *createPostMachineScheduler();
244 static ScheduleDAGInstrs *useDefaultMachineSched(MachineSchedContext *C) { in useDefaultMachineSched()
310 ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() { in createMachineScheduler()
317 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
328 ScheduleDAGInstrs *PostMachineScheduler::createPostMachineScheduler() { in createPostMachineScheduler()
330 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
383 std::unique_ptr<ScheduleDAGInstrs> Scheduler(createMachineScheduler()); in runOnMachineFunction()
415 std::unique_ptr<ScheduleDAGInstrs> Scheduler(createPostMachineScheduler()); in runOnMachineFunction()
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| D | MacroFusion.cpp | 127 void apply(ScheduleDAGInstrs *DAGInstrs) override;
132 void MacroFusion::apply(ScheduleDAGInstrs *DAGInstrs) { in apply()
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| D | DFAPacketizer.cpp | 167 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
194 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in DefaultVLIWScheduler()
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| /external/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 77 static void dumpSUList(ScheduleDAGInstrs::SUList &L) { in dumpSUList()
89 ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf, in ScheduleDAGInstrs() function in ScheduleDAGInstrs
212 void ScheduleDAGInstrs::startBlock(MachineBasicBlock *bb) { in startBlock()
216 void ScheduleDAGInstrs::finishBlock() { in finishBlock()
225 void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, in enterRegion()
237 void ScheduleDAGInstrs::exitRegion() { in exitRegion()
249 void ScheduleDAGInstrs::addSchedBarrierDeps() { in addSchedBarrierDeps()
283 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps()
326 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps()
401 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
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| D | PostRASchedulerList.cpp | 114 class SchedulePostRATDList : public ScheduleDAGInstrs {
211 : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) { in SchedulePostRATDList()
240 ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs); in enterRegion()
251 ScheduleDAGInstrs::exitRegion(); in exitRegion()
381 ScheduleDAGInstrs::startBlock(BB); in startBlock()
444 ScheduleDAGInstrs::finishBlock(); in finishBlock()
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| D | MachineScheduler.cpp | 120 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
135 ScheduleDAGInstrs *createMachineScheduler();
150 ScheduleDAGInstrs *createPostMachineScheduler();
208 static ScheduleDAGInstrs *useDefaultMachineSched(MachineSchedContext *C) { in useDefaultMachineSched()
235 static ScheduleDAGInstrs *createGenericSchedLive(MachineSchedContext *C);
236 static ScheduleDAGInstrs *createGenericSchedPostRA(MachineSchedContext *C);
283 ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() { in createMachineScheduler()
290 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
301 ScheduleDAGInstrs *PostMachineScheduler::createPostMachineScheduler() { in createPostMachineScheduler()
303 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
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| D | DFAPacketizer.cpp | 159 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
183 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in DefaultVLIWScheduler()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAGInstrs.h | 100 class ScheduleDAGInstrs : public ScheduleDAG {
236 explicit ScheduleDAGInstrs(MachineFunction &mf,
240 ~ScheduleDAGInstrs() override {} in ~ScheduleDAGInstrs()
341 inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { in newSUnit()
353 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit()
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| D | ScheduleDAGMutation.h | 19 class ScheduleDAGInstrs; variable
27 virtual void apply(ScheduleDAGInstrs *DAG) = 0;
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| D | TargetPassConfig.h | 24 class ScheduleDAGInstrs; variable
242 virtual ScheduleDAGInstrs *
249 virtual ScheduleDAGInstrs *
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| D | MachineScheduler.h | 94 class ScheduleDAGInstrs; variable
118 typedef ScheduleDAGInstrs *(*ScheduleDAGCtor)(MachineSchedContext *);
226 class ScheduleDAGMI : public ScheduleDAGInstrs {
257 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA), in ScheduleDAGMI()
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| D | ScheduleDFS.h | 25 class ScheduleDAGInstrs; variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAGMutation.h | 20 class ScheduleDAGInstrs; variable
29 virtual void apply(ScheduleDAGInstrs *DAG) = 0;
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| D | ScheduleDAGInstrs.h | 119 class ScheduleDAGInstrs : public ScheduleDAG {
250 explicit ScheduleDAGInstrs(MachineFunction &mf,
254 ~ScheduleDAGInstrs() override = default;
364 inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { in newSUnit()
375 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit()
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| D | TargetPassConfig.h | 27 class ScheduleDAGInstrs; variable
283 virtual ScheduleDAGInstrs *
290 virtual ScheduleDAGInstrs *
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| D | MachineScheduler.h | 137 using ScheduleDAGCtor = ScheduleDAGInstrs *(*)(MachineSchedContext *);
260 class ScheduleDAGMI : public ScheduleDAGInstrs {
292 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA), in ScheduleDAGMI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.cpp | 194 static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { in createR600MachineScheduler()
198 static ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C) { in createSIMachineScheduler()
202 static ScheduleDAGInstrs *
212 static ScheduleDAGInstrs *
221 static ScheduleDAGInstrs *createMinRegScheduler(MachineSchedContext *C) { in createMinRegScheduler()
226 static ScheduleDAGInstrs *
515 ScheduleDAGInstrs *
537 ScheduleDAGInstrs *createMachineScheduler( in createMachineScheduler()
563 ScheduleDAGInstrs *
751 ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler( in createMachineScheduler()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.h | 69 void apply(ScheduleDAGInstrs *DAG) override;
72 void apply(ScheduleDAGInstrs *DAG) override;
75 void apply(ScheduleDAGInstrs *DAG) override;
81 void apply(ScheduleDAGInstrs *DAG) override;
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| D | HexagonSubtarget.cpp | 129 void HexagonSubtarget::UsrOverflowMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
142 void HexagonSubtarget::HVXMemLatencyMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
193 void HexagonSubtarget::CallMutation::apply(ScheduleDAGInstrs *DAGInstrs) { in apply()
264 void HexagonSubtarget::BankConflictMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPU.h | 26 class ScheduleDAGInstrs; variable
55 ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C);
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| D | AMDGPUTargetMachine.cpp | 98 static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { in createR600MachineScheduler()
289 ScheduleDAGInstrs *createMachineScheduler( in createMachineScheduler()
309 ScheduleDAGInstrs *
465 ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler( in createMachineScheduler()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonTargetMachine.cpp | 95 static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) { in createVLIWMachineSched()
203 ScheduleDAGInstrs *
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | misched-killflags.mir | 2 # Make sure ScheduleDAGInstrs::fixupKills does not produce invalid kill flags.
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