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Searched refs:Sd (Results 1 – 25 of 258) sorted by relevance

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/external/vboot_reference/utility/
Defidecompress.c96 IN SCRATCH_DATA *Sd, in FillBuf() argument
114 Sd->mBitBuf = (UINT32) (Sd->mBitBuf << NumOfBits); in FillBuf()
116 while (NumOfBits > Sd->mBitCount) { in FillBuf()
118 Sd->mBitBuf |= (UINT32) (Sd->mSubBitBuf << (NumOfBits = (UINT16) (NumOfBits - Sd->mBitCount))); in FillBuf()
120 if (Sd->mCompSize > 0) { in FillBuf()
124 Sd->mCompSize--; in FillBuf()
125 Sd->mSubBitBuf = 0; in FillBuf()
126 Sd->mSubBitBuf = Sd->mSrcBase[Sd->mInBuf++]; in FillBuf()
127 Sd->mBitCount = 8; in FillBuf()
133 Sd->mSubBitBuf = 0; in FillBuf()
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/external/llvm/lib/Target/ARM/
DARMInstrVFP.td105 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
106 IIC_fpLoad32, "vldr", "\t$Sd, $addr",
107 [(set SPR:$Sd, (alignedload32 addrmode5:$addr))]> {
113 def VLDRH : AHI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5fp16:$addr),
114 IIC_fpLoad16, "vldr", ".16\t$Sd, $addr",
124 def VSTRS : ASI5<0b1101, 0b00, (outs), (ins SPR:$Sd, addrmode5:$addr),
125 IIC_fpStore32, "vstr", "\t$Sd, $addr",
126 [(alignedstore32 SPR:$Sd, addrmode5:$addr)]> {
132 def VSTRH : AHI5<0b1101, 0b00, (outs), (ins SPR:$Sd, addrmode5fp16:$addr),
133 IIC_fpStore16, "vstr", ".16\t$Sd, $addr",
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DARMInstrFormats.td1484 bits<5> Sd;
1489 let Inst{22} = Sd{0};
1491 let Inst{15-12} = Sd{4-1};
1511 bits<5> Sd;
1516 let Inst{22} = Sd{0};
1518 let Inst{15-12} = Sd{4-1};
1720 bits<5> Sd;
1726 let Inst{15-12} = Sd{4-1};
1727 let Inst{22} = Sd{0};
1745 bits<5> Sd;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrVFP.td125 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
126 IIC_fpLoad32, "vldr", "\t$Sd, $addr",
127 [(set SPR:$Sd, (alignedload32 addrmode5:$addr))]> {
133 def VLDRH : AHI5<0b1101, 0b01, (outs HPR:$Sd), (ins addrmode5fp16:$addr),
134 IIC_fpLoad16, "vldr", ".16\t$Sd, $addr",
135 [(set HPR:$Sd, (alignedload16 addrmode5fp16:$addr))]>,
144 def VSTRS : ASI5<0b1101, 0b00, (outs), (ins SPR:$Sd, addrmode5:$addr),
145 IIC_fpStore32, "vstr", "\t$Sd, $addr",
146 [(alignedstore32 SPR:$Sd, addrmode5:$addr)]> {
152 def VSTRH : AHI5<0b1101, 0b00, (outs), (ins HPR:$Sd, addrmode5fp16:$addr),
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DARMInstrFormats.td1516 bits<5> Sd;
1521 let Inst{22} = Sd{0};
1523 let Inst{15-12} = Sd{4-1};
1543 bits<5> Sd;
1548 let Inst{22} = Sd{0};
1550 let Inst{15-12} = Sd{4-1};
1752 bits<5> Sd;
1758 let Inst{15-12} = Sd{4-1};
1759 let Inst{22} = Sd{0};
1777 bits<5> Sd;
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/external/clang/test/OpenMP/
Dtarget_codegen_global_capture.cpp47 static float Sd = 8.0; in foo() local
151 Sd += 1.0; in foo()
154 return a + b + c + d + (int)Sa + (int)Sb + (int)Sc + (int)Sd; in foo()
170 static float Sd = 12.0; in bar() local
285 Sd += 1.0; in bar()
289 return a + b + c + d + (int)Sa + (int)Sb + (int)Sc + (int)Sd; in bar()
312 static float Sd = 20.0; in tbar() local
427 Sd += 1.0; in tbar()
431 return a + b + c + d + (int)Sa + (int)Sb + (int)Sc + (int)Sd; in tbar()
/external/clang/test/CodeGen/
Dppc64-struct-onefloat.c5 typedef struct s2 { double d; } Sd; typedef
7 typedef struct s5 { Sd ds; } SSd;
9 void bar(Sf a, Sd b, SSf d, SSd e) {} in bar()
31 Sd p2 = { 19.47 }; in foo()
/external/toolchain-utils/crosperf/test_cache/test_input/
Dresults.txt1Sd 3d-cube: 1.247219ms\n13:23:35 INFO | autoserv| RESULT 3d-morph: 3d-morph= [23,22,22,22,22,22,2…
/external/v8/src/builtins/mips64/
Dbuiltins-mips64.cc324 __ Sd(v0, FieldMemOperand(a1, JSGeneratorObject::kInputOrDebugPosOffset)); in Generate_ResumeGeneratorTrampoline() local
561 __ Sd(fp, MemOperand(s1)); in Generate_JSEntryVariant() local
586 __ Sd(v0, MemOperand(s1)); // We come back from 'invoke'. result is in v0. in Generate_JSEntryVariant() local
635 __ Sd(zero_reg, MemOperand(a5)); in Generate_JSEntryVariant() local
642 __ Sd(a5, MemOperand(a4)); in Generate_JSEntryVariant() local
769 __ Sd(optimized_code, FieldMemOperand(closure, JSFunction::kCodeOffset)); in ReplaceClosureCodeWithOptimizedCode() local
1102 __ Sd(a3, MemOperand(a5)); in Generate_InterpreterEntryTrampoline() local
1160 __ Sd(kInterpreterBytecodeOffsetRegister, in Generate_InterpreterEntryTrampoline() local
1174 __ Sd(a5, MemOperand(fp, InterpreterFrameConstants::kBytecodeOffsetFromFp)); in Generate_InterpreterEntryTrampoline() local
1446 __ Sd(a2, MemOperand(fp, InterpreterFrameConstants::kBytecodeOffsetFromFp)); in Generate_InterpreterEnterBytecodeAdvance() local
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/external/v8/src/codegen/mips64/
Dmacro-assembler-mips64.h285 void Sd(Register rd, const MemOperand& rs);
289 Sd(src, MemOperand(sp, 0)); in push()
298 Sd(src1, MemOperand(sp, 1 * kPointerSize)); in Push()
299 Sd(src2, MemOperand(sp, 0 * kPointerSize)); in Push()
305 Sd(src1, MemOperand(sp, 2 * kPointerSize)); in Push()
306 Sd(src2, MemOperand(sp, 1 * kPointerSize)); in Push()
307 Sd(src3, MemOperand(sp, 0 * kPointerSize)); in Push()
313 Sd(src1, MemOperand(sp, 3 * kPointerSize)); in Push()
314 Sd(src2, MemOperand(sp, 2 * kPointerSize)); in Push()
315 Sd(src3, MemOperand(sp, 1 * kPointerSize)); in Push()
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Dmacro-assembler-mips64.cc1347 Sd(rd, rs); in Usd()
1473 void TurboAssembler::Sd(Register rd, const MemOperand& rs) { in Sd() function in v8::internal::TurboAssembler
1962 Sd(ToRegister(i), MemOperand(sp, stack_offset)); in MultiPush()
4396 Sd(ra, MemOperand(sp)); in StoreReturnAddressAndCall()
4594 Sd(sp, MemOperand(t2)); in PushStackHandler()
4607 Sd(a1, MemOperand(scratch)); in PopStackHandler()
4727 Sd(tmp_reg, MemOperand(dst_reg)); in PrepareForTailCall()
4806 Sd(t1, MemOperand(dest, 0)); in InvokePrologue()
4818 Sd(t0, MemOperand(a7, 0)); in InvokePrologue()
5246 Sd(ra, MemOperand(sp, stack_offset)); in EnterFrame()
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/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp1117 void AssemblerARM32::emitMoveSS(CondARM32::Cond Cond, IValueT Sd, IValueT Sm) { in emitMoveSS() argument
1124 emitVFPsss(Cond, VmovssOpcode, Sd, S0, Sm); in emitMoveSS()
1293 IValueT Sd, IValueT Sn, IValueT Sm) { in emitVFPsss() argument
1294 assert(Sd < RegARM32::getNumSRegs()); in emitVFPsss()
1301 (getYInRegXXXXY(Sd) << 22) | (getXXXXInRegXXXXY(Sn) << 16) | in emitVFPsss()
1302 (getXXXXInRegXXXXY(Sd) << 12) | (getYInRegXXXXY(Sn) << 7) | in emitVFPsss()
1310 const IValueT Sd = encodeSRegister(OpSd, "Sd", InstName); in emitVFPsss() local
1313 emitVFPsss(Cond, Opcode, Sd, Sn, Sm); in emitVFPsss()
2330 IValueT Sd = encodeSRegister(OpSd, "Sd", Vabss); in vabss() local
2334 emitVFPsss(Cond, VabssOpcode, Sd, S0, Sm); in vabss()
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/external/v8/src/regexp/mips64/
Dregexp-macro-assembler-mips64.cc191 __ Sd(a0, register_location(reg)); in AdvanceRegister() local
202 __ Sd(a0, MemOperand(frame_pointer(), kBacktrackCount)); in Backtrack() local
742 __ Sd(a0, MemOperand(frame_pointer(), kStringStartMinusOne)); in GetCode() local
768 __ Sd(a0, MemOperand(a1)); in GetCode() local
774 __ Sd(a0, register_location(i)); in GetCode() local
838 __ Sd(a0, MemOperand(frame_pointer(), kSuccessfulCaptures)); in GetCode() local
846 __ Sd(a1, MemOperand(frame_pointer(), kNumOutputRegisters)); in GetCode() local
849 __ Sd(a2, MemOperand(frame_pointer(), kRegisterOutput)); in GetCode() local
1021 __ Sd(a0, register_location(register_index)); in PopRegister() local
1093 __ Sd(a0, register_location(register_index)); in SetRegister() local
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/external/honggfuzz/examples/apache-httpd/corpus_http1/
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/external/honggfuzz/examples/apache-httpd/corpus_http2/
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72 W��wB�v5p���X��F���A�����S�Sd��
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89 W��wB�v5p���X��F���A�����S�Sd��
/external/angle/src/libANGLE/renderer/vulkan/shaders/src/
DConvertVertex.comp23 // stride Sd = Nd*Bd (i.e. packed). The output size is therefore V*Nd*Bd bytes. The dispatch size
139 uint Sd; // Precalculated Nd*Bd
147 #define Sd params.Sd
174 return vertex * Sd + component * Bd + params.destOffset;
/external/clang/include/clang/Basic/
Darm_neon.td1413 def SCALAR_FCVTZS_N_S64 : SInst<"vcvt_n_s64", "$si", "Sd">;
1414 def SCALAR_FCVTZU_N_U64 : SInst<"vcvt_n_u64", "bsi", "Sd">;
1474 def SCALAR_FCVTXN : IInst<"vcvtx_f32", "ys", "Sd">;
1477 def SCALAR_FCVTNSD : SInst<"vcvtn_s64", "$s", "Sd">;
1478 def SCALAR_FCVTNUD : SInst<"vcvtn_u64", "bs", "Sd">;
1481 def SCALAR_FCVTMSD : SInst<"vcvtm_s64", "$s", "Sd">;
1482 def SCALAR_FCVTMUD : SInst<"vcvtm_u64", "bs", "Sd">;
1485 def SCALAR_FCVTASD : SInst<"vcvta_s64", "$s", "Sd">;
1486 def SCALAR_FCVTAUD : SInst<"vcvta_u64", "bs", "Sd">;
1489 def SCALAR_FCVTPSD : SInst<"vcvtp_s64", "$s", "Sd">;
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/external/clang/test/SemaCXX/
Derr_typecheck_assign_const_filecheck.cpp25 static D Sd; member
/external/ImageMagick/PerlMagick/t/reference/filter/
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