| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | X86EVEX2VEXTablesEmitter.cpp | 64 OS << " { X86::" << Pair.first->TheDef->getName() in printTable()
65 << ", X86::" << Pair.second->TheDef->getName() << " },\n"; in printTable()
110 Record *RecE = EVEXInst->TheDef; in operator ()()
111 Record *RecV = VEXInst->TheDef; in operator ()()
196 if (!Inst->TheDef->isSubClassOf("X86Inst")) in run()
201 if (Inst->TheDef->getValueAsDef("OpEnc")->getName() == "EncVEX") { in run()
202 uint64_t Opcode = getValueFromBitsInit(Inst->TheDef-> in run()
207 else if (Inst->TheDef->getValueAsDef("OpEnc")->getName() == "EncEVEX" && in run()
208 !Inst->TheDef->getValueAsBit("hasEVEX_K") && in run()
209 !Inst->TheDef->getValueAsBit("hasEVEX_B") && in run()
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| D | SubtargetFeatureInfo.h | 31 Record *TheDef; member
36 SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {} in SubtargetFeatureInfo()
40 return "Feature_" + TheDef->getName().str(); in getEnumName()
46 return "Feature_" + TheDef->getName().str() + "Bit"; in getEnumBitName()
50 return TheDef->getValueAsBit("RecomputePerFunction"); in mustRecomputePerFunction()
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| D | RegisterBankEmitter.cpp | 35 const Record &TheDef; member in __anonbd77687b0111::RegisterBank
44 RegisterBank(const Record &TheDef) in RegisterBank() argument
45 : TheDef(TheDef), RCs(), RCWithLargestRegsSize(nullptr) {} in RegisterBank()
48 StringRef getName() const { return TheDef.getValueAsString("Name"); } in getName()
50 std::string getEnumeratorName() const { return (TheDef.getName() + "ID").str(); } in getEnumeratorName()
54 return (TheDef.getName() + "CoverageData").str(); in getCoverageArrayName()
58 StringRef getInstanceVarName() const { return TheDef.getName(); } in getInstanceVarName()
60 const Record &getDef() const { return TheDef; } in getDef()
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| D | X86FoldTablesEmitter.cpp | 79 return Inst->TheDef->getName().find(InstStr) != StringRef::npos; in isExplicitAlign()
85 return Inst->TheDef->getName().find(InstStr) != StringRef::npos; in isExplicitUnalign()
111 OS << "{ X86::" << E.RegInst->TheDef->getName() in operator <<()
112 << ", X86::" << E.MemInst->TheDef->getName() << ", "; in operator <<()
299 StringRef AltRegInstStr = I->TheDef->getValueAsString("FoldGenRegForm"); in getAltRegInst()
317 Record *MemRec = MemInst->TheDef; in operator ()()
318 Record *RegRec = RegInst->TheDef; in operator ()()
447 Record *RegRec = RegInstr->TheDef; in addEntryWithFlags()
448 Record *MemRec = MemInstr->TheDef; in addEntryWithFlags()
503 Record *RegRec = RegInstr->TheDef; in updateTables()
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| D | AsmWriterInst.cpp | 98 CGI.TheDef->getName() + "'!"); in AsmWriterInst()
136 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
143 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
151 PrintFatalError("Bad operand modifier name in '"+ CGI.TheDef->getName() + "'"); in AsmWriterInst()
156 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
160 PrintFatalError("Stray '$' in '" + CGI.TheDef->getName() + in AsmWriterInst()
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| D | CodeGenSchedule.cpp | 122 StringRef InstName = Inst->TheDef->getName(); in apply()
125 Elts.insert(Inst->TheDef); in apply()
135 return LHS->TheDef->getName() < RHS; in apply()
138 return LHS < RHS->TheDef->getName() && in apply()
139 !RHS->TheDef->getName().startswith(LHS); in apply()
150 StringRef InstName = Inst->TheDef->getName(); in apply()
152 Elts.insert(Inst->TheDef); in apply()
335 Record *SchedDef = Inst->TheDef; in collectSchedRW()
411 findRWs(CGRW.TheDef->getValueAsListOfDefs("Writes"), CGRW.Sequence, in collectSchedRW()
462 RWVec, [Def](const CodeGenSchedRW &RW) { return RW.TheDef == Def; }); in getSchedRWIdx()
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| D | InstrInfoEmitter.cpp | 227 if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable")) in initOperandMapData()
240 Inst->TheDef->getName().str()); in initOperandMapData()
446 Record *Inst = II->TheDef; in run()
474 InstrNames.add(Inst->TheDef->getName()); in run()
492 OS << InstrNames.get(Inst->TheDef->getName()) << "U, "; in run()
564 << Inst.TheDef->getValueAsInt("Size") << ",\t" in emitRecord()
609 BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags"); in emitRecord()
617 PrintFatalError("Invalid TSFlags bit in " + Inst.TheDef->getName()); in emitRecord()
624 std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses"); in emitRecord()
630 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs"); in emitRecord()
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| D | AsmMatcherEmitter.cpp | 502 Record *const TheDef; member
544 : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI), in MatchableInfo()
549 : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef), in MatchableInfo()
552 TheDef->getValueAsBit("UseInstAsmMatchConverter")) { in MatchableInfo()
560 TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands), in MatchableInfo()
803 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n"; in dump()
841 parseTwoOperandConstraint(Constraint, TheDef->getLoc()); in formTwoOperandAlias()
847 PrintFatalError(TheDef->getLoc(), in formTwoOperandAlias()
851 PrintFatalError(TheDef->getLoc(), in formTwoOperandAlias()
897 Op.SingletonReg = Reg->TheDef; in extractSingletonRegisterForAsmOperand()
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| D | AsmWriterEmitter.cpp | 126 << FirstInst.CGI->TheDef->getName() << ":\n"; in EmitInstructions()
129 << AWI.CGI->TheDef->getName() << ":\n"; in EmitInstructions()
141 FirstInst.CGI->TheDef->getName().str(), in EmitInstructions()
146 AWI.CGI->TheDef->getName().str(), in EmitInstructions()
184 InstrsForCase[idx] += Inst.CGI->TheDef->getName(); in FindUniqueOperandCommands()
188 InstrsForCase.push_back(Inst.CGI->TheDef->getName()); in FindUniqueOperandCommands()
404 << NumberedInstructions[i]->TheDef->getName() << "\n"; in EmitPrintInstruction()
511 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
517 Reg.TheDef->getValueAsListOfDefs("RegAltNameIndices"); in emitRegisterNameString()
527 Reg.TheDef->getValueAsListOfStrings("AltNames"); in emitRegisterNameString()
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| D | RISCVCompressInstEmitter.cpp | 256 PrintFatalError("Input operands for Inst '" + Inst.TheDef->getName() + in verifyDagOpCount()
260 PrintFatalError("Inst '" + Inst.TheDef->getName() + in verifyDagOpCount()
271 PrintFatalError("Inst '" + Inst.TheDef->getName() + in verifyDagOpCount()
546 return (LHS.Source.TheDef->getName().str() < in emitCompressInstEmitter()
547 RHS.Source.TheDef->getName().str()); in emitCompressInstEmitter()
549 return (LHS.Dest.TheDef->getName().str() < in emitCompressInstEmitter()
550 RHS.Dest.TheDef->getName().str()); in emitCompressInstEmitter()
612 CurOp = Source.TheDef->getName().str(); in emitCompressInstEmitter()
626 std::vector<Record *> RF = Dest.TheDef->getValueAsListOfDefs("Predicates"); in emitCompressInstEmitter()
682 "::" + Dest.TheDef->getName().str() + ");\n"; in emitCompressInstEmitter()
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| D | CodeGenInstruction.cpp | 28 CGIOperandList::CGIOperandList(Record *R) : TheDef(R) { in CGIOperandList()
143 PrintFatalError("'" + TheDef->getName() + in getOperandNamed()
163 PrintFatalError(TheDef->getName() + ": Illegal operand name: '" + Op + "'"); in ParseOperandName()
173 PrintFatalError(TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'"); in ParseOperandName()
183 PrintFatalError(TheDef->getName() + ": Illegal to refer to" in ParseOperandName()
193 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
201 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
300 : TheDef(R), Operands(R), InferredFrom(nullptr) { in CodeGenInstruction()
441 if (DagInit *ConstraintList = TheDef->getValueAsDag("InOperandList")) { in isOperandAPointer()
599 : TheDef(R) { in CodeGenInstAlias()
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| D | CodeGenSchedule.h | 47 Record *TheDef; member
57 : Index(0), TheDef(nullptr), IsRead(false), IsAlias(false), in CodeGenSchedRW()
60 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) { in CodeGenSchedRW()
75 : Index(Idx), Name(Name), TheDef(nullptr), IsRead(Read), IsAlias(false), in CodeGenSchedRW()
81 assert((!HasVariants || TheDef) && "Variant write needs record def"); in isValid()
86 return TheDef || !Sequence.empty(); in isValid()
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| D | SubtargetFeatureInfo.cpp | 22 errs() << getEnumName() << " " << Index << "\n" << *TheDef; in dump()
114 OS << " if (" << SFI.TheDef->getValueAsString("CondString") << ")\n"; in emitComputeAvailableFeatures()
132 SFI.TheDef->getValueAsString("AssemblerCondString"); in emitComputeAssemblerAvailableFeatures()
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| D | SubtargetEmitter.cpp | 841 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in FindWriteResources()
842 return SchedWrite.TheDef; in FindWriteResources()
848 if (AliasRW.TheDef->getValueInit("SchedModel")->isComplete()) { in FindWriteResources()
849 Record *ModelDef = AliasRW.TheDef->getValueAsDef("SchedModel"); in FindWriteResources()
854 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in FindWriteResources()
857 AliasDef = AliasRW.TheDef; in FindWriteResources()
868 || SchedWrite.TheDef == WR->getValueAsDef("WriteType")) { in FindWriteResources()
882 SchedWrite.TheDef->getName()); in FindWriteResources()
892 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance()
893 return SchedRead.TheDef; in FindReadAdvance()
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| D | CodeGenRegisters.cpp | 54 : TheDef(R), EnumValue(Enum), AllSuperRegsCovered(true), Artificial(true) { in CodeGenSubRegIndex()
64 : TheDef(nullptr), Name(N), Namespace(Nspace), Size(-1), Offset(-1), in CodeGenSubRegIndex()
77 if (!TheDef) in updateComponents()
80 std::vector<Record*> Comps = TheDef->getValueAsListOfDefs("ComposedOf"); in updateComponents()
83 PrintFatalError(TheDef->getLoc(), in updateComponents()
89 PrintFatalError(TheDef->getLoc(), "Ambiguous ComposedOf entries"); in updateComponents()
93 TheDef->getValueAsListOfDefs("CoveringSubRegIndices"); in updateComponents()
96 PrintFatalError(TheDef->getLoc(), in updateComponents()
157 : TheDef(R), in CodeGenRegister()
169 std::vector<Record*> SRIs = TheDef->getValueAsListOfDefs("SubRegIndices"); in buildObjectGraph()
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| /external/llvm/utils/TableGen/ |
| D | AsmWriterInst.cpp | 98 CGI.TheDef->getName() + "'!"); in AsmWriterInst()
136 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
143 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
151 PrintFatalError("Bad operand modifier name in '"+ CGI.TheDef->getName() + "'"); in AsmWriterInst()
156 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
160 PrintFatalError("Stray '$' in '" + CGI.TheDef->getName() + in AsmWriterInst()
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| D | InstrInfoEmitter.cpp | 208 if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable")) in initOperandMapData()
220 OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName()); in initOperandMapData()
360 Record *Inst = II->TheDef; in run()
388 InstrNames.add(Inst->TheDef->getName()); in run()
406 OS << InstrNames.get(Inst->TheDef->getName()) << "U, "; in run()
474 << Inst.TheDef->getValueAsInt("Size") << ",\t" in emitRecord()
512 BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags"); in emitRecord()
520 PrintFatalError("Invalid TSFlags bit in " + Inst.TheDef->getName()); in emitRecord()
527 std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses"); in emitRecord()
533 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs"); in emitRecord()
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| D | AsmMatcherEmitter.cpp | 472 Record *const TheDef; member
514 : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI), in MatchableInfo()
519 : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef), in MatchableInfo()
522 TheDef->getValueAsBit("UseInstAsmMatchConverter")) { in MatchableInfo()
530 TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands), in MatchableInfo()
660 Record *TheDef; member
665 SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {} in SubtargetFeatureInfo()
669 return "Feature_" + TheDef->getName(); in getEnumName()
674 TheDef->dump(); in dump()
786 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n"; in dump()
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| D | CodeGenSchedule.cpp | 73 if (R.match(Inst->TheDef->getName())) in apply()
74 Elts.insert(Inst->TheDef); in apply()
214 Record *SchedDef = Inst->TheDef; in collectSchedRW()
293 findRWs(WI->TheDef->getValueAsListOfDefs("Writes"), WI->Sequence, in collectSchedRW()
346 if (I->TheDef == Def) in getSchedRWIdx()
354 Record *ReadDef = SchedReads[i].TheDef; in hasReadOfWrite()
409 SchedRW.TheDef ? SchedRW.TheDef->getValueAsInt("Repeat") : 1; in expandRWSequence()
435 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in expandRWSeqForProc()
438 AliasDef = AliasRW.TheDef; in expandRWSeqForProc()
450 SchedWrite.TheDef ? SchedWrite.TheDef->getValueAsInt("Repeat") : 1; in expandRWSeqForProc()
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| D | AsmWriterEmitter.cpp | 105 << FirstInst.CGI->TheDef->getName() << ":\n"; in EmitInstructions()
108 << AWI.CGI->TheDef->getName() << ":\n"; in EmitInstructions()
120 FirstInst.CGI->TheDef->getName(), in EmitInstructions()
125 AWI.CGI->TheDef->getName(), in EmitInstructions()
165 InstrsForCase[idx] += Inst.CGI->TheDef->getName(); in FindUniqueOperandCommands()
169 InstrsForCase.push_back(Inst.CGI->TheDef->getName()); in FindUniqueOperandCommands()
386 << NumberedInstructions[i]->TheDef->getName() << "\n"; in EmitPrintInstruction()
504 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
510 Reg.TheDef->getValueAsListOfDefs("RegAltNameIndices"); in emitRegisterNameString()
520 Reg.TheDef->getValueAsListOfStrings("AltNames"); in emitRegisterNameString()
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| D | SubtargetEmitter.cpp | 653 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in FindWriteResources()
654 return SchedWrite.TheDef; in FindWriteResources()
660 if (AliasRW.TheDef->getValueInit("SchedModel")->isComplete()) { in FindWriteResources()
661 Record *ModelDef = AliasRW.TheDef->getValueAsDef("SchedModel"); in FindWriteResources()
666 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in FindWriteResources()
669 AliasDef = AliasRW.TheDef; in FindWriteResources()
680 || SchedWrite.TheDef == WR->getValueAsDef("WriteType")) { in FindWriteResources()
694 + SchedWrite.TheDef->getName()); in FindWriteResources()
704 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance()
705 return SchedRead.TheDef; in FindReadAdvance()
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| D | CodeGenSchedule.h | 49 Record *TheDef; member
59 : Index(0), TheDef(nullptr), IsRead(false), IsAlias(false), in CodeGenSchedRW()
62 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) { in CodeGenSchedRW()
77 : Index(Idx), Name(Name), TheDef(nullptr), IsRead(Read), IsAlias(false), in CodeGenSchedRW()
83 assert((!HasVariants || TheDef) && "Variant write needs record def"); in isValid()
88 return TheDef || !Sequence.empty(); in isValid()
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| D | CodeGenRegisters.cpp | 34 : TheDef(R), EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
44 : TheDef(nullptr), Name(N), Namespace(Nspace), Size(-1), Offset(-1), in CodeGenSubRegIndex()
57 if (!TheDef) in updateComponents()
60 std::vector<Record*> Comps = TheDef->getValueAsListOfDefs("ComposedOf"); in updateComponents()
63 PrintFatalError(TheDef->getLoc(), in updateComponents()
69 PrintFatalError(TheDef->getLoc(), "Ambiguous ComposedOf entries"); in updateComponents()
73 TheDef->getValueAsListOfDefs("CoveringSubRegIndices"); in updateComponents()
76 PrintFatalError(TheDef->getLoc(), in updateComponents()
107 : TheDef(R), in CodeGenRegister()
118 std::vector<Record*> SRIs = TheDef->getValueAsListOfDefs("SubRegIndices"); in buildObjectGraph()
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| D | CodeGenInstruction.cpp | 28 CGIOperandList::CGIOperandList(Record *R) : TheDef(R) { in CGIOperandList()
142 PrintFatalError("'" + TheDef->getName() + in getOperandNamed()
162 PrintFatalError(TheDef->getName() + ": Illegal operand name: '" + Op + "'"); in ParseOperandName()
172 PrintFatalError(TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'"); in ParseOperandName()
182 PrintFatalError(TheDef->getName() + ": Illegal to refer to" in ParseOperandName()
192 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
200 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
299 : TheDef(R), Operands(R), InferredFrom(nullptr) { in CodeGenInstruction()
580 : TheDef(R) { in CodeGenInstAlias()
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| D | CodeGenInstruction.h | 128 Record *TheDef; // The actual record containing this OperandList. variable
208 Record *TheDef; // The actual record defining this instruction.
292 Record *TheDef; // The actual record defining this InstAlias.
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