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Searched refs:UART_LCR (Results 1 – 7 of 7) sorted by relevance

/external/arm-trusted-firmware/plat/mediatek/mt8183/drivers/uart/
Duart.c30 mmio_write_32(UART_LCR(base), UART_LCR_MODE_B); in mt_uart_restore()
32 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_restore()
39 mmio_write_32(UART_LCR(base), in mt_uart_restore()
43 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_restore()
70 uart->registers.lcr = mmio_read_32(UART_LCR(base)); in mt_uart_save()
72 mmio_write_32(UART_LCR(base), UART_LCR_MODE_B); in mt_uart_save()
74 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_save()
81 mmio_write_32(UART_LCR(base), in mt_uart_save()
85 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_save()
Duart.h29 #define UART_LCR(_baseaddr) (_baseaddr + 0xc) macro
/external/arm-trusted-firmware/plat/mediatek/common/drivers/uart/
D8250_console.S69 str w1, [x0, #UART_LCR]
80 str w1, [x0, #UART_LCR]
Duart8250.h16 #define UART_LCR 0x0c /* Line control register */ macro
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c1132 #define UART_LCR 0x0c macro
1152 uart_save.uart_lcr = mmio_read_32(uart_base + UART_LCR); in suspend_uart()
1155 mmio_write_32(uart_base + UART_LCR, in suspend_uart()
1159 mmio_write_32(uart_base + UART_LCR, uart_save.uart_lcr); in suspend_uart()
1173 uart_lcr = mmio_read_32(uart_base + UART_LCR); in resume_uart()
1175 mmio_write_32(uart_base + UART_LCR, uart_lcr | UARTLCR_DLAB); in resume_uart()
1178 mmio_write_32(uart_base + UART_LCR, uart_save.uart_lcr); in resume_uart()
/external/kernel-headers/original/uapi/linux/
Dserial_reg.h98 #define UART_LCR 3 /* Out: Line Control Register */ macro
/external/u-boot/include/linux/
Dserial_reg.h89 #define UART_LCR 3 /* Out: Line Control Register */ macro