/external/llvm/test/CodeGen/ARM/ |
D | unaligned_load_store.ll | 8 ; RUN: | FileCheck %s -check-prefix=UNALIGNED 25 ; UNALIGNED-LABEL: t: 26 ; UNALIGNED: ldr r1 27 ; UNALIGNED: str r1 44 ; UNALIGNED-LABEL: hword: 45 ; UNALIGNED: vld1.16 46 ; UNALIGNED: vst1.16 60 ; UNALIGNED-LABEL: byte: 61 ; UNALIGNED: vld1.8 62 ; UNALIGNED: vst1.8 [all …]
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D | 2011-10-26-memset-inline.ll | 3 ; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s -check-prefix=CHECK-UNALIGNED 13 ; CHECK-UNALIGNED: strb 14 ; CHECK-UNALIGNED: str
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | unaligned_load_store.ll | 8 ; RUN: | FileCheck %s -check-prefix=UNALIGNED 25 ; UNALIGNED-LABEL: t: 26 ; UNALIGNED: ldr r1 27 ; UNALIGNED: str r1 44 ; UNALIGNED-LABEL: hword: 45 ; UNALIGNED: vld1.16 46 ; UNALIGNED: vst1.16 60 ; UNALIGNED-LABEL: byte: 61 ; UNALIGNED: vld1.8 62 ; UNALIGNED: vst1.8 [all …]
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D | 2011-10-26-memset-inline.ll | 3 ; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s -check-prefix=CHECK-UNALIGNED 13 ; CHECK-UNALIGNED: strb 14 ; CHECK-UNALIGNED: str
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/ |
D | merge-stores-private.ll | 4 … -load-store-vectorizer -S -o - %s | FileCheck -check-prefixes=ELT4,ELT4-UNALIGNED,UNALIGNED,ALL %s 5 … -load-store-vectorizer -S -o - %s | FileCheck -check-prefixes=ELT8,ELT8-UNALIGNED,UNALIGNED,ALL %s 6 …load-store-vectorizer -S -o - %s | FileCheck -check-prefixes=ELT16,ELT16-UNALIGNED,UNALIGNED,ALL %s 15 ; ELT8-UNALIGNED: store <2 x i32> 16 ; ELT8-UNALIGNED: store <2 x i32> 18 ; ELT16-UNALIGNED: store <4 x i32> 37 ; ELT16-UNALIGNED: store <4 x i32> <i32 9, i32 1, i32 23, i32 19>, <4 x i32> addrspace(5)* %1, alig… 39 ; ELT8-UNALIGNED: store <2 x i32> <i32 9, i32 1>, <2 x i32> addrspace(5)* %1, align 1 40 ; ELT8-UNALIGNED: store <2 x i32> <i32 23, i32 19>, <2 x i32> addrspace(5)* %2, align 1 42 ; ELT4-UNALIGNED: store i32 [all …]
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D | adjust-alloca-alignment.ll | 2 …atch-access,+max-private-element-size-16 < %s | FileCheck -check-prefix=UNALIGNED -check-prefix=AL… 8 ; UNALIGNED: load <2 x i8>, <2 x i8> addrspace(5)* %{{[0-9]+}}, align 1{{$}} 25 ; UNALIGNED: load <2 x i16>, <2 x i16> addrspace(5)* %{{[0-9]+}}, align 1{{$}} 45 ; UNALIGNED: load <2 x i32>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 1{{$}} 65 ; UNALIGNED: load <2 x i32>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 1{{$}} 83 ; UNALIGNED: store <2 x i8> <i8 9, i8 10>, <2 x i8> addrspace(5)* %{{[0-9]+}}, align 1{{$}} 98 ; UNALIGNED: store <2 x i16> <i16 9, i16 10>, <2 x i16> addrspace(5)* %{{[0-9]+}}, align 1{{$}} 117 ; UNALIGNED: store <2 x i32> <i32 9, i32 10>, <2 x i32> addrspace(5)* %{{[0-9]+}}, align 1{{$}}
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/external/tcpdump/ |
D | ip6.h | 88 } UNALIGNED; variable 114 } UNALIGNED; variable 121 } UNALIGNED; variable 128 } UNALIGNED; variable 173 } UNALIGNED; variable 195 } UNALIGNED; variable
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D | netdissect-stdinc.h | 251 #if !(defined(_MSC_VER) && defined(UNALIGNED)) 253 #undef UNALIGNED 254 #define UNALIGNED __attribute__((packed)) macro
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D | print-dccp.c | 52 } UNALIGNED; variable 77 } UNALIGNED; variable 92 } UNALIGNED; variable 103 } UNALIGNED; variable 115 } UNALIGNED; variable
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D | tcp.h | 51 } UNALIGNED; variable
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D | print-bootp.c | 75 } UNALIGNED; variable 250 } UNALIGNED; variable
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/external/llvm/test/CodeGen/AMDGPU/ |
D | unaligned-load-store.ll | 2 …ned-buffer-access -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=UNALIGNED %s 23 ; UNALIGNED: buffer_load_ushort 24 ; UNALIGNED: buffer_store_short 61 ; UNALIGNED: buffer_load_dword 62 ; UNALIGNED: buffer_store_dword 75 ; UNALIGNED: buffer_load_dword 76 ; UNALIGNED: buffer_store_dword 210 ; UNALIGNED: buffer_load_dwordx2 211 ; UNALIGNED: buffer_store_dwordx2 240 ; UNALIGNED: buffer_load_dwordx2 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | unaligned-load-store.ll | 2 …ned-buffer-access -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=UNALIGNED %s 23 ; UNALIGNED: buffer_load_ushort 24 ; UNALIGNED: buffer_store_short 61 ; UNALIGNED: buffer_load_dword 62 ; UNALIGNED: buffer_store_dword 75 ; UNALIGNED: buffer_load_dword 76 ; UNALIGNED: buffer_store_dword 210 ; UNALIGNED: buffer_load_dwordx2 211 ; UNALIGNED: buffer_store_dwordx2 240 ; UNALIGNED: buffer_load_dwordx2 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | unaligned-spill-folding.ll | 1 …sd -mcpu=core2 -stack-alignment=4 -relocation-model=pic < %s | FileCheck %s -check-prefix=UNALIGNED 35 ; UNALIGNED-LABEL: @test1 36 ; UNALIGNED-NOT: andl $-{{..}}, %esp 37 ; UNALIGNED: movdqu {{.*}} # 16-byte Spill 38 ; UNALIGNED-NOT: paddd {{.*}} # 16-byte Folded Reload
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/external/llvm/test/CodeGen/X86/ |
D | unaligned-spill-folding.ll | 1 …sd -mcpu=core2 -stack-alignment=4 -relocation-model=pic < %s | FileCheck %s -check-prefix=UNALIGNED 35 ; UNALIGNED-LABEL: @test1 36 ; UNALIGNED-NOT: andl $-{{..}}, %esp 37 ; UNALIGNED: movdqu {{.*}} # 16-byte Folded Spill 38 ; UNALIGNED-NOT: paddd {{.*}} # 16-byte Folded Reload
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/external/u-boot/doc/ |
D | README.unaligned-memory-access.txt | 4 UNALIGNED MEMORY ACCESSES
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